Event Queue in a Logical Partition
    1.
    发明申请
    Event Queue in a Logical Partition 审中-公开
    逻辑分区中的事件队列

    公开(公告)号:US20080028116A1

    公开(公告)日:2008-01-31

    申请号:US11777316

    申请日:2007-07-13

    IPC分类号: G06F13/24

    摘要: An information processing system is provided which includes a plurality of system resources, and an event queue having a predetermined number of entries. An event recording mechanism of the information processing system is operable to make entries regarding events in the event queue, wherein the entries are limited to a predetermined number of active entries in the event queue per each type of event per each of the system resources. In a particular embodiment, the number of entries per each type of event for each of the system resources is limited to one.

    摘要翻译: 提供了包括多个系统资源的信息处理系统和具有预定数量的条目的事件队列。 信息处理系统的事件记录机制可操作用于对事件队列中的事件进行条目,其中每个系统资源每个事件类型事件限制事件队列中预定数量的活动条目。 在特定实施例中,每个系统资源的每种类型的事件的条目数量被限制为一个。

    Low-latency data decryption interface
    3.
    发明申请
    Low-latency data decryption interface 有权
    低延迟数据解密界面

    公开(公告)号:US20060047953A1

    公开(公告)日:2006-03-02

    申请号:US10932727

    申请日:2004-09-02

    IPC分类号: H04L9/00

    摘要: Methods and apparatus for reducing the impact of latency associated with decrypting encrypted data are provided. Rather than wait until an entire packet of encrypted data is validated (e.g., by checking for data transfer errors), the encrypted data may be pipelined to a decryption engine as it is received, thus allowing decryption to begin prior to validation. In some cases, the decryption engine may be notified of data transfer errors detected during the validation process, in order to prevent reporting false security violations.

    摘要翻译: 提供了减少与解密加密数据相关的延迟的影响的方法和装置。 而不是等到整个加密数据包被验证(例如,通过检查数据传输错误),加密的数据可以在被接收时被流水线化到解密引擎,从而允许在验证之前开始解密。 在一些情况下,可以向解密引擎通知在验证过程期间检测到的数据传输错误,以防止报告错误的安全违规。

    Fast path memory read request processing in a multi-level memory architecture
    5.
    发明申请
    Fast path memory read request processing in a multi-level memory architecture 有权
    快速路径存储器在多级存储器架构中的读请求处理

    公开(公告)号:US20070113019A1

    公开(公告)日:2007-05-17

    申请号:US11282093

    申请日:2005-11-17

    IPC分类号: G06F12/00

    摘要: A circuit arrangement and method selectively reorder speculatively issued memory read requests being communicated to a lower memory level in a multi-level memory architecture. In particular, a memory read request that has been speculatively issued to a lower memory level prior to completion of a cache lookup operation initiated in a cache memory in a higher memory level may be reordered ahead of at least one previously received and pending request awaiting communication to the lower memory level. By doing so, the latency associated with the memory read request is reduced when the request results in a cache miss in the higher level memory, and as a result, system performance is improved.

    摘要翻译: 电路布置和方法选择性地重新排序在多级存储器体系结构中被推送的存储器读请求被传送到较低存储器级。 特别地,在高级存储器级别的高速缓冲存储器中启动的高速缓存查找操作完成之前被推测地发布到较低存储器级别的存储器读取请求可以在至少一个先前接收到的等待通信的等待请求之前重新排序 到较低的内存级别。 通过这样做,当请求导致高级存储器中的高速缓存未命中时,与存储器读取请求相关联的延迟被减少,结果提高了系统性能。

    Infiniband general services queue pair virtualization for multiple logical ports on a single physical port
    6.
    发明申请
    Infiniband general services queue pair virtualization for multiple logical ports on a single physical port 失效
    Infiniband通用服务在单个物理端口上的多个逻辑端口的队列对虚拟化

    公开(公告)号:US20050100033A1

    公开(公告)日:2005-05-12

    申请号:US10702994

    申请日:2003-11-06

    IPC分类号: H04L12/56

    摘要: A method, system, and computer program product are disclosed within a logically partitioned data processing system for providing an aliased queue pair for each logical partition for the single general services management queue pair that exists within a physical host channel adapter. Packets intended for the logical ports are received at the physical port. Multiple partitions exist within the data processing system. When one of these partitions needs to use one of the logical ports, a queue pair is selected. The queue pair is then associated with the logical port. The queue pair is configured as an aliased general services management queue pair and is used by the partition as if the aliased queue pair were the single general services management queue pair provided in the channel adapter.

    摘要翻译: 在逻辑分区的数据处理系统中公开了一种方法,系统和计算机程序产品,用于为存在于物理主机信道适配器内的单个通用业务管理队列对的每个逻辑分区提供混叠队列对。 用于逻辑端口的数据包在物理端口接收。 数据处理系统中存在多个分区。 当其中一个分区需要使用其中一个逻辑端口时,将选择一个队列对。 队列对与逻辑端口相关联。 队列对被配置为别名通用业务管理队列对,由分区使用,就好像别名队列对是通道适配器中提供的单一通用业务管理队列一样。

    DYNAMIC LOAD-BASED CREDIT DISTRIBUTION
    7.
    发明申请
    DYNAMIC LOAD-BASED CREDIT DISTRIBUTION 失效
    基于动态负载的信用分配

    公开(公告)号:US20080117931A1

    公开(公告)日:2008-05-22

    申请号:US12018226

    申请日:2008-01-23

    IPC分类号: H04J3/16

    CPC分类号: G06F13/4208

    摘要: Methods and systems for dynamically adjusting credits used to distribute available bus bandwidth among multiple virtual channels, based on the workload of each virtual channel, are provided. Accordingly, for some embodiments, virtual channels with higher workloads relative to other virtual channels may receive a higher allocation of bus bandwidth (more credits).

    摘要翻译: 提供了基于每个虚拟通道的工作负载动态调整用于在多个虚拟通道中分配可用总线带宽的信用的方法和系统。 因此,对于一些实施例,相对于其他虚拟信道具有较高工作负载的虚拟信道可以接收更高的总线带宽分配(更多信用)。

    Dynamic load-based credit distribution
    8.
    发明申请
    Dynamic load-based credit distribution 有权
    基于动态负载的信用分配

    公开(公告)号:US20050254519A1

    公开(公告)日:2005-11-17

    申请号:US10845497

    申请日:2004-05-13

    IPC分类号: G06F13/42 H04J3/16

    CPC分类号: G06F13/4208

    摘要: Methods and systems for dynamically adjusting credits used to distribute available bus bandwidth among multiple virtual channels, based on the workload of each virtual channel, are provided. Accordingly, for some embodiments, virtual channels with higher workloads relative to other virtual channels may receive a higher allocation of bus bandwidth (more credits).

    摘要翻译: 提供了基于每个虚拟通道的工作负载动态调整用于在多个虚拟通道中分配可用总线带宽的信用的方法和系统。 因此,对于一些实施例,相对于其他虚拟信道具有较高工作负载的虚拟信道可以接收更高的总线带宽分配(更多信用)。

    Method for implementing dynamic virtual lane buffer reconfiguration
    9.
    发明申请
    Method for implementing dynamic virtual lane buffer reconfiguration 失效
    实现动态虚拟通道缓冲区重新配置的方法

    公开(公告)号:US20050060445A1

    公开(公告)日:2005-03-17

    申请号:US10660033

    申请日:2003-09-11

    IPC分类号: G06F3/00 H04L12/56

    摘要: A method, apparatus and computer program product are provided for implementing dynamic Virtual Lane buffer reconfiguration in a channel adapter. A first register is provided for communicating an adapter buffer size and allocation capability for the channel adapter. At least one second register is provided for communicating a current port buffer size and one second register is associated with each physical port of the channel adapter. A plurality of third registers is provided for communicating a current VL buffer size, and one third register is associated with each VL of each physical port of the channel adapter. The second register is used for receiving change requests for adjusting the current port buffer size for an associated physical port. The third register is used for receiving change requests for adjusting the current VL buffer size for an associated VL.

    摘要翻译: 提供了一种用于在通道适配器中实现动态虚拟通道缓冲器重新配置的方法,装置和计算机程序产品。 第一个寄存器用于传送适配器缓冲区大小和通道适配器的分配能力。 提供至少一个第二寄存器用于传送当前端口缓冲器大小,一个第二寄存器与信道适配器的每个物理端口相关联。 提供多个第三寄存器用于传送当前的VL缓冲器大小,并且一个第三寄存器与通道适配器的每个物理端口的每个VL相关联。 第二个寄存器用于接收用于调整相关物理端口的当前端口缓冲区大小的更改请求。 第三寄存器用于接收用于调整相关VL的当前VL缓冲器大小的改变请求。

    Infiniband subnet management queue pair emulation for multiple logical ports on a single physical port
    10.
    发明申请
    Infiniband subnet management queue pair emulation for multiple logical ports on a single physical port 审中-公开
    Infiniband子网管理队列对仿真,用于单个物理端口上的多个逻辑端口

    公开(公告)号:US20050018669A1

    公开(公告)日:2005-01-27

    申请号:US10626988

    申请日:2003-07-25

    IPC分类号: H04L12/56

    摘要: A Host Channel Adapter supporting a plurality of Logical Partitions is provided. A Subnet Manager, having an associated aliased Queue Pair, may run in a Logical Partition. A single physical subnet management Queue Pair and its associated firmware are provided for each physical port in the Host Channel Adapter. If a packet is to be routed to a Subnet Manager residing in a Logical Partition, the packet is enqueued on the physical port's send queue for transmission to the aliased Queue Pair for the Subnet Manager. The Host Channel Adapter hardware loops the packet back to the aliased Queue Pair in the appropriate Logical Partition. The aliased Queue Pair is also capable of transmitting packets that are looped back to a Hypervisor Subnet Management Agent.

    摘要翻译: 提供了支持多个逻辑分区的主机通道适配器。 具有关联的别名队列对的子网管理器可以在逻辑分区中运行。 为主机通道适配器中的每个物理端口提供单个物理子网管理队列对及其相关固件。 如果要将数据包路由到驻留在逻辑分区中的子网管理器,则该数据包将在物理端口的发送队列中排队,以传输到子网管理器的别名队列对。 主机通道适配器硬件将数据包循环回相应逻辑分区中的别名队列对。 别名队列对还能够发送环回到管理程序子网管理代理的数据包。