Current sensing circuit for a multi-phase DC-DC converter
    11.
    发明申请
    Current sensing circuit for a multi-phase DC-DC converter 有权
    用于多相DC-DC转换器的电流检测电路

    公开(公告)号:US20050225307A1

    公开(公告)日:2005-10-13

    申请号:US11044950

    申请日:2005-01-26

    IPC分类号: G05F1/40 H02M3/158

    CPC分类号: H02M3/1584 H02M2001/0009

    摘要: Embodiments of a current sensing circuit for a multi-phase DC-DC converter are disclosed. In one embodiment, an integrated circuit (IC) may be provided that has high- and low-side switch arrays being coupled to an output terminal as well as being coupled between high and low voltage terminals. The switch arrays may also include at least one bonding pad and at least one bonding wire. The IC may also include a driver coupled to the switch arrays for driving the switch arrays and a sensing circuit that coupled to the bonding pad for detecting a signal passing through the bonding wire.

    摘要翻译: 公开了用于多相DC-DC转换器的电流检测电路的实施例。 在一个实施例中,可以提供集成电路(IC),其具有耦合到输出端子以及耦合在高电压和低电压端子之间的高侧和低侧开关阵列。 开关阵列还可以包括至少一个接合焊盘和至少一个接合线。 IC还可以包括耦合到用于驱动开关阵列的开关阵列的驱动器和耦合到接合焊盘的感测电路,用于检测通过接合线的信号。

    Modem device
    12.
    发明授权
    Modem device 失效
    调制解调器设备

    公开(公告)号:US5452329A

    公开(公告)日:1995-09-19

    申请号:US291140

    申请日:1994-08-16

    申请人: Tetsuo Sato

    发明人: Tetsuo Sato

    IPC分类号: H04L29/10 H04M11/06 H04B1/00

    CPC分类号: H04M11/06

    摘要: A modem device enabling a single communication line to be shared by a plurality of terminal units, and needing no switching operation between the terminal units on transmission. In transmission, when a transmission-start request is supplied from a terminal unit of any channel, the state of the other channels are checked. If these other channels are all in idle state, a channel selecting signal for selecting the channel corresponding to the transmission-start request is turned on so as to couple the corresponding terminal unit to a modem section for starting the transmission. In reception, on the other hand, upon receiving a call, priority calling channel information having been set in a predetermined mode register is read out to turn on a channel selecting signal for selecting the channel indicated by that information. As a result, a terminal unit of the channel corresponding to the channel selecting signal is selected to enable the receiving operation.

    摘要翻译: 一种调制解调器装置,其能够使单个通信线路由多个终端单元共享,并且在传输时不需要终端单元之间的切换操作。 在传输中,当从任何信道的终端单元提供发送开始请求时,检查其他信道的状态。 如果这些其他信道都处于空闲状态,则用于选择与发送开始请求对应的信道的信道选择信号被接通,以便将相应的终端单元耦合到用于开始发送的调制解调器部分。 另一方面,在接收中,在接收到呼叫时,读出已经设置在预定模式寄存器中的优先呼叫信道信息,以接通用于选择由该信息指示的频道的频道选择信号。 结果,选择对应于频道选择信号的频道的终端单元以使接收操作成为可能。

    Probe device and method of controlling the same
    13.
    发明授权
    Probe device and method of controlling the same 失效
    探头装置及其控制方法

    公开(公告)号:US5034684A

    公开(公告)日:1991-07-23

    申请号:US426010

    申请日:1989-10-24

    IPC分类号: G01R31/28

    CPC分类号: G01R31/2831

    摘要: A probe device having a loader unit and two measuring units is disclosed. Each of the loader and measuring units is an independent unit supported by an independent casing. Each of the loader and measuring units has its exclusive slave CPU and integrated circuit members are under the control of this slave CPU to manage operations of members at the unit. The slave CPUs are connected to a master CPU, which controls the slave CPUs and which is also an independent unit, and they are connected to one another only through the master CPU. Program language is common to the master and slave CPUs and the units can be electrically connected to form an integral control system in which signals are exchanged among the units.

    摘要翻译: 公开了一种具有装载单元和两个测量单元的探针装置。 每个装载机和测量单元是由独立的壳体支撑的独立单元。 每个装载机和测量单元都有其独有的从属CPU,集成电路组件由该从CPU控制,以管理设备中的成员的操作。 从CPU连接到主CPU,主CPU控制从站CPU,也是独立单元,它们仅通过主站CPU相互连接。 程序语言对于主从CPU是通用的,并且单元可以被电连接以形成在单元之间交换信号的集成控制系统。

    Signal transmission circuit
    14.
    发明授权
    Signal transmission circuit 失效
    信号传输电路

    公开(公告)号:US4639795A

    公开(公告)日:1987-01-27

    申请号:US841830

    申请日:1986-03-20

    摘要: A signal transmission circuit includes a switched capacitor and a control circuit. The switched capacitor includes a capacitor and a plurality of switching means. The control circuit controls the frequency or level of a control signal to be applied to the switching means of the switched capacitor. By varying the frequency of the control signal with the control circuit, the equivalent resistance of the switched capacitor can be varied. By controlling the level of the control signal with the control circuit, at least one of the plurality of switching means is held in the "off" state thereof, to substantially inhibit the signal transmission of the switched capacitor.

    摘要翻译: 信号传输电路包括开关电容器和控制电路。 开关电容器包括电容器和多个开关装置。 控制电路控制要施加到开关电容器的开关装置的控制信号的频率或电平。 通过利用控制电路改变控制信号的频率,可以改变开关电容器的等效电阻。 通过利用控制电路控制控制信号的电平,多个开关装置中的至少一个保持在“关闭”状态,从而基本上禁止开关电容器的信号传输。

    Indicating system
    15.
    发明授权
    Indicating system 失效
    指示系统

    公开(公告)号:US4574276A

    公开(公告)日:1986-03-04

    申请号:US473211

    申请日:1983-03-08

    申请人: Tetsuo Sato

    发明人: Tetsuo Sato

    CPC分类号: G01R19/1659 G01D7/04

    摘要: An indicating system includes first and second voltage comparators, first and second output circuits which are respectively supplied with output signals of the first and second voltage comparators, and first and second indicating elements which are connected to a common output terminal of the first and second output circuits. A first input terminal of the first voltage comparator is supplied with a first reference voltage, and a second input terminal thereof is supplied with a control signal. A first input terminal of the second voltage comparator is supplied with a second reference voltage, and a second input terminal thereof supplied with the control signal. When the voltage level of the control signal is higher than the first reference voltage, the first output circuit causes a current of a first polarity to flow to the common output terminal. As a result, the first indicating element is lit up, and the second indicating element is not. When the voltage level of the control signal is lower than the second reference voltage, the second output circuit causes a current of a second polarity to flow to the common output terminal. As a result, the second indicating element is lit up, and the first indicating element is not. When the voltage level of the control signal is intermediate between the first and second reference voltages, neither of the first and second indicating elements are lit up.

    摘要翻译: 指示系统包括第一和第二电压比较器,分别被提供有第一和第二电压比较器的输出信号的第一和第二输出电路以及连接到第一和第二输出端的公共输出端的第一和第二指示元件 电路。 第一电压比较器的第一输入端被提供有第一参考电压,并且其第二输入端被提供控制信号。 第二电压比较器的第一输入端被提供有第二参考电压,其第二输入端被提供有控制信号。 当控制信号的电压电平高于第一参考电压时,第一输出电路使第一极性的电流流到公共输出端。 结果,第一指示元件点亮,第二指示元件不亮。 当控制信号的电压电平低于第二参考电压时,第二输出电路使第二极性的电流流到公共输出端。 结果,第二指示元件点亮,第一指示元件不亮。 当控制信号的电压电平处于第一和第二参考电压之间时,第一和第二指示元件都不亮。

    Signal processing circuit employing an improved composite current mirror
circuit/device
    16.
    发明授权
    Signal processing circuit employing an improved composite current mirror circuit/device 失效
    采用改进的复合电流镜电路/器件的信号处理电路

    公开(公告)号:US4489285A

    公开(公告)日:1984-12-18

    申请号:US482792

    申请日:1983-04-07

    申请人: Tetsuo Sato

    发明人: Tetsuo Sato

    CPC分类号: G01R19/1659 G01D7/04

    摘要: An electric circuit is constructed of a first current mirror circuit and a second current mirror circuit. The first current mirror circuit has a first input transistor, a first coupling transistor and an output transistor, while the second current mirror circuit has a second input transistor, a second coupling transistor and the output transistor.First and second input terminals are respectively connected to the collectors of the first and second input transistors, and a common output terminal is connected to the collector of the output transistor.First and second additional transistors are respectively connected to the first and second input transistors, whereby an output current proportional to either greater value of two input currents supplied to the two input terminals is provided from the common output terminal.

    摘要翻译: 电路由第一电流镜电路和第二电流镜电路构成。 第一电流镜电路具有第一输入晶体管,第一耦合晶体管和输出晶体管,而第二电流镜电路具有第二输入晶体管,第二耦合晶体管和输出晶体管。 第一和第二输入端子分别连接到第一和第二输入晶体管的集电极,并且公共输出端子连接到输出晶体管的集电极。 第一和第二附加晶体管分别连接到第一和第二输入晶体管,由此从公共输出端子提供与提供给两个输入端的两个输入电流的较大值成比例的输出电流。

    Switchable signal compressor/signal expander
    17.
    发明授权
    Switchable signal compressor/signal expander 失效
    可切换信号压缩器/信号扩展器

    公开(公告)号:US4412189A

    公开(公告)日:1983-10-25

    申请号:US262814

    申请日:1981-05-12

    IPC分类号: H03G9/02 H04B1/64

    CPC分类号: H03G9/025

    摘要: Either an input signal of a combining network or an output signal of an inverter arranged on a main path is fed to a side path through a mode switch in a switchable signal compressor/signal expander. Since an input terminal of a control amplifier is connected to a variable filter without passing through a signal amplifier, the deviation of the detection characteristic of a rectifier and integrator attributed to D.C. offset voltages of the signal amplifier and the control amplifier can be reduced. On the other hand, a switchable signal compressor/signal expander in another aspect of performance has a reference voltage generator for producing a D.C. reference voltage, and the output D.C. level of the control amplifier is maintained at a level approximate to the D.C. reference voltage. The other ends of first and second capacitors of the rectifier and integrator are also supplied with the D.C. reference voltage, so that the fluctuation of the detection characteristic of the rectifier and integrator ascribable to the fluctuation of the D.C. reference voltage is reduced.

    摘要翻译: 组合网络的输入信号或布置在主路径上的反相器的输出信号被馈送到可切换信号压缩器/信号扩展器中的模式开关的侧路径。 由于控制放大器的输入端子连接到可变滤波器而不通过信号放大器,所以可以减小归因于信号放大器和控制放大器的直流偏移电压的整流器和积分器的检测特性的偏差。 另一方面,另一方面的可切换信号压缩器/信号扩展器具有用于产生直流参考电压的参考电压发生器,并且控制放大器的输出直流电平保持在接近直流参考电压的电平。 整流器和积分器的第一和第二电容器的另一端还具有直流参考电压,从而降低归因于直流参考电压的波动的整流器和积分器的检测特性的波动。

    Integrated voltage control variable gain circuit and a signal
transmission circuit using the same
    18.
    发明授权
    Integrated voltage control variable gain circuit and a signal transmission circuit using the same 失效
    集成电压控制可变增益电路和使用该电路的信号传输电路

    公开(公告)号:US4366449A

    公开(公告)日:1982-12-28

    申请号:US152295

    申请日:1980-05-22

    申请人: Tetsuo Sato

    发明人: Tetsuo Sato

    摘要: An integrated voltage control variable gain circuit capable of exhibiting, when the external circuit network is connected in a first configuration, a low distortion factor of the output signal, and capable of effecting, when the external circuit network is connected in a second configuration, independent controls of gains for different two input signals. The integrated voltage control variable gain circuit is provided, in its integrated part, with a first operational amplifier circuit, a second operational amplifier circuit, a third operational amplifier circuit, a fourth operational amplifier circuit, a fifth operational amplifier circuit, a first gain control section and a second gain control section. The first operational amplifier circuit, the first gain control section and the third operational amplifier circuit are arranged in a first signal line, while, in the second signal line, arranged are the second operational amplifier circuit, the second gain control section and the fourth operational amplifier circuit. It is possible to select whether the fifth operational amplifier circuit is disposed on the second signal line, by selecting the configurations of the external circuit network.

    摘要翻译: 一种集成电压控制可变增益电路,其能够在外部电路网络以第一配置连接时显示输出信号的低失真因子,并且能够在外部电路网络以第二配置连接时实现独立 控制不同的两个输入信号的增益。 集成电压控制可变增益电路在其集成部分中提供有第一运算放大器电路,第二运算放大器电路,第三运算放大器电路,第四运算放大器电路,第五运算放大器电路,第一增益控制 部分和第二增益控制部分。 第一运算放大器电路,第一增益控制部分和第三运算放大器电路布置在第一信号线中,而在第二信号线中布置有第二运算放大器电路,第二运算放大器电路,第二增益控制部分和第四运算放大器电路 放大电路。 通过选择外部电路网络的配置,可以选择第五运算放大器电路是否设置在第二信号线上。

    Synthesizer tuner
    19.
    发明授权
    Synthesizer tuner 失效
    合成调谐器

    公开(公告)号:US4282603A

    公开(公告)日:1981-08-04

    申请号:US56851

    申请日:1979-07-12

    申请人: Tetsuo Sato

    发明人: Tetsuo Sato

    CPC分类号: H03J5/0281 H03J5/0263

    摘要: A selecting information for adjusting the frequency-dividing ratio of a programable divider in a PLL synthesizer tuner is stored in the memory.In order to prevent the same selecting information from being written down in the different addresses in the memory, all of the selecting informations already written down in the memory is compared with the selecting information that is to be written down by a comparator circuit before the selecting information is written down in the memory. The output of the comparator circuit permis the selecting information to be written into the new addresses only when the selecting information that is to be written down is different from all of the selecting informations which have been written down already.

    摘要翻译: 用于调整PLL合成器调谐器中可编程分频器的分频比的选择信息被存储在存储器中。 为了防止将相同的选择信息写入到存储器中的不同地址中,所有已经写入存储器中的所有选择信息与在选择之前由比较器电路写入的选择信息进行比较 信息被记录在内存中。 只有当要写入的选择信息与已经写入的所有选择信息不同时,比较器电路的输出才允许将要写入新地址的选择信息。