Method for manufacturing a semiconductor device and semiconductor device manufactured thereby
    12.
    发明授权
    Method for manufacturing a semiconductor device and semiconductor device manufactured thereby 有权
    由此制造半导体器件和半导体器件的方法

    公开(公告)号:US09466689B2

    公开(公告)日:2016-10-11

    申请号:US14372451

    申请日:2013-03-29

    摘要: A semiconductor device includes an input electrode provided on a front surface of a semiconductor substrate of a first conductivity type and an output electrode provided on a rear surface of the semiconductor substrate. The device has reduced deterioration of electrical characteristics when manufactured by a method including introducing impurities into the rear surface of the semiconductor substrate; activating the impurities using a first annealing process to form a first semiconductor layer, which is a contact portion in contact with the output electrode, in a surface layer of the rear surface; radiating protons to the rear surface; and activating the protons radiated using a second annealing process to form a second semiconductor layer of the first conductivity type, which has a higher impurity concentration than the semiconductor substrate, in a region that is deeper than the first semiconductor layer from the rear surface of the semiconductor substrate.

    摘要翻译: 半导体器件包括设置在第一导电类型的半导体衬底的前表面上的输入电极和设置在半导体衬底的后表面上的输出电极。 当通过包括将杂质引入到半导体衬底的后表面的方法制造时,该器件减少了电特性的劣化; 使用第一退火工艺激活杂质,以在后表面的表面层中形成与输出电极接触的接触部分的第一半导体层; 将质子辐射到后表面; 以及激活使用第二退火处理辐射的质子,以形成第二导电类型的第二半导体层,该第一半导体层具有比半导体衬底更高的杂质浓度, 半导体衬底。

    Manufacturing method for semiconductor device
    13.
    发明授权
    Manufacturing method for semiconductor device 有权
    半导体器件的制造方法

    公开(公告)号:US09385211B2

    公开(公告)日:2016-07-05

    申请号:US14372453

    申请日:2013-03-29

    摘要: A p+ collector layer is provided in a rear surface of a semiconductor substrate which will be an n− drift layer and an n+ field stop layer is provided in a region which is deeper than the p+ collector layer formed on the rear surface side. A front surface element structure is formed on the front surface of the semiconductor substrate and then protons are radiated to the rear surface of the semiconductor substrate at an acceleration voltage corresponding to the depth at which the n+ field stop layer is formed. A first annealing process is performed at an annealing temperature corresponding to the proton irradiation to change the protons into donors, thereby forming a field stop layer. Then, annealing is performed using annealing conditions suitable for the conditions of a plurality of proton irradiation processes to recover each crystal defect formed by each proton irradiation process.

    摘要翻译: 在作为n漂移层的半导体衬底的后表面设置p +集电极层,并且在比形成在背面侧的p +集电体层更深的区域设置n +场阻挡层。 在半导体衬底的前表面上形成前表面元件结构,然后以对应于形成n +场停止层的深度的加速电压将质子辐射到半导体衬底的后表面。 在对应于质子照射的退火温度下进行第一退火处理以将质子转化为供体,从而形成场停止层。 然后,使用适合于多个质子照射处理的条件的退火条件进行退火,以回收由每个质子照射过程形成的每个晶体缺陷。

    Method for manufacturing semiconductor device by performing multiple ion implantation processes
    14.
    发明授权
    Method for manufacturing semiconductor device by performing multiple ion implantation processes 有权
    通过进行多个离子注入工艺来制造半导体器件的方法

    公开(公告)号:US08999824B2

    公开(公告)日:2015-04-07

    申请号:US14302103

    申请日:2014-06-11

    摘要: A method for manufacturing a semiconductor device suppresses loss of vacuum in a chamber of an ion implanter, sag of a resist mask pattern for ion implantation, and producing a resist residue after ashing. First ion implanting process implants n-type impurity to form n+ impurity layer on the whole back surface of n− semiconductor wafer. A resist mask on the back surface of the wafer covers a part corresponding to where n+ cathode layer will be formed. A second ion implanting process implants p-type impurity using the resist mask to form p+ impurity layer in the interior of the n+ impurity layer. Second ion implanting process is split into two or more times. The dose of p-type impurity in second ion implanting process is greater than that of n-type impurity in first ion implanting process. The resist mask is removed, and p+ the n+ impurity layers activated.

    摘要翻译: 半导体装置的制造方法抑制离子注入机的室内的真空损失,离子注入用抗蚀剂掩模图案的下垂,灰化后产生抗蚀剂残留物。 第一离子注入工艺在n半导体晶片的整个背面上埋入n型杂质以形成n +杂质层。 晶片背面的抗蚀剂掩模覆盖对应于将形成n +阴极层的部分。 第二离子注入工艺使用抗蚀剂掩模注入p型杂质,以在n +杂质层的内部形成p +杂质层。 第二次离子注入过程分为两次或更多次。 在第一离子注入过程中,第二离子注入过程中p型杂质的剂量大于n型杂质的剂量。 去除抗蚀剂掩模,并激活p + n +杂质层。

    METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
    19.
    发明申请
    METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
    制造半导体器件的方法

    公开(公告)号:US20150024556A1

    公开(公告)日:2015-01-22

    申请号:US14372451

    申请日:2013-03-29

    IPC分类号: H01L29/66

    摘要: A semiconductor device includes an input electrode provided on a front surface of a semiconductor substrate of a first conductivity type and an output electrode provided on a rear surface of the semiconductor substrate. The device has reduced deterioration of electrical characteristics when manufactured by a method including introducing impurities into the rear surface of the semiconductor substrate; activating the impurities using a first annealing process to form a first semiconductor layer, which is a contact portion in contact with the output electrode, in a surface layer of the rear surface; radiating protons to the rear surface; and activating the protons radiated using a second annealing process to form a second semiconductor layer of the first conductivity type, which has a higher impurity concentration than the semiconductor substrate, in a region that is deeper than the first semiconductor layer from the rear surface of the semiconductor substrate.

    摘要翻译: 半导体器件包括设置在第一导电类型的半导体衬底的前表面上的输入电极和设置在半导体衬底的后表面上的输出电极。 当通过包括将杂质引入到半导体衬底的后表面的方法制造时,该器件减少了电特性的劣化; 使用第一退火工艺激活杂质,以在后表面的表面层中形成与输出电极接触的接触部分的第一半导体层; 将质子辐射到后表面; 以及激活使用第二退火处理辐射的质子,以形成第二导电类型的第二半导体层,该第一半导体层具有比半导体衬底更高的杂质浓度, 半导体衬底。

    MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
    20.
    发明申请
    MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE 有权
    半导体器件的制造方法

    公开(公告)号:US20140374793A1

    公开(公告)日:2014-12-25

    申请号:US14372453

    申请日:2013-03-29

    摘要: A p+ collector layer is provided in a rear surface of a semiconductor substrate which will be an n− drift layer and an n+ field stop layer is provided in a region which is deeper than the p+ collector layer formed on the rear surface side. A front surface element structure is formed on the front surface of the semiconductor substrate and then protons are radiated to the rear surface of the semiconductor substrate at an acceleration voltage corresponding to the depth at which the n+ field stop layer is formed. A first annealing process is performed at an annealing temperature corresponding to the proton irradiation to change the protons into donors, thereby forming a field stop layer. Then, annealing is performed using annealing conditions suitable for the conditions of a plurality of proton irradiation processes to recover each crystal defect formed by each proton irradiation process.

    摘要翻译: 在作为n漂移层的半导体衬底的后表面设置p +集电极层,并且在比形成在背面侧的p +集电体层更深的区域设置n +场阻挡层。 在半导体衬底的前表面上形成前表面元件结构,然后以对应于形成n +场停止层的深度的加速电压将质子辐射到半导体衬底的后表面。 在对应于质子照射的退火温度下进行第一退火处理以将质子转化为供体,从而形成场停止层。 然后,使用适合于多个质子照射处理的条件的退火条件进行退火,以回收由每个质子照射过程形成的每个晶体缺陷。