摘要:
The present invention relates to a nonvolatile memory such as, for example a ROM or an EPROM, in which the information density of the memory is increased relative to a conventional nonvolatile memory that includes two logic state devices. Specifically, the nonvolatile memory of the present invention includes a SiN/TaN/SiN thin film resistor embedded within a material having a thermal conductivity of about 1 W/m-K or less; and a non-linear Si-containing device coupled to the resistor. Read and write circuits and operations are also provided in the present application.
摘要翻译:本发明涉及诸如ROM或EPROM的非易失性存储器,其中存储器的信息密度相对于包括两个逻辑状态器件的常规非易失性存储器而增加。 具体地,本发明的非易失性存储器包括嵌入在热导率为约1W / m-K以下的材料中的SiN / TaN / SiN薄膜电阻器; 以及耦合到电阻器的非线性含Si器件。 读写电路和操作也在本申请中提供。
摘要:
On-chip real-time moisture detection circuitry for monitoring ingress of moisture into an integrated circuit chip during the operational lifetime of the chip. The moisture detection circuitry includes one or more moisture-sensing units and a common moisture monitor for monitoring the state of each moisture-sensing units. The moisture monitor can be configured to provided a real-time moisture-detected signal for signaling that moisture ingress into the integrated circuit chip has occurred.
摘要:
A testing structure, system and method for monitoring electro-migration (EM) performance. A system is described that includes an array of testing structures, wherein each testing structure includes: an EM resistor having four point resistive measurement, wherein a first and second terminals provide current input and a third and fourth terminals provide a voltage measurement; a first transistor coupled to a first terminal of the EM resistor for supplying a test current; the voltage measurement obtained from a pair of switching transistors whose gates are controlled by a selection switch and whose drains are utilized to provide a voltage measurement across the third and fourth terminals. Also included is a decoder for selectively activating the selection switch for one of the array of testing structures; and a pair of outputs for outputting the voltage measurement of a selected testing structure.
摘要:
A design structure for an on-chip real-time moisture detection circuitry for monitoring ingress of moisture into an integrated circuit chip during the operational lifetime of the chip. The moisture detection circuitry includes one or more moisture-sensing units and a common moisture monitor for monitoring the state of each moisture-sensing units. The moisture monitor can be configured to provided a real-time moisture-detected signal for signaling that moisture ingress into the integrated circuit chip has occurred.
摘要:
The present invention relates to a nonvolatile memory such as, for example a ROM or an EPROM, in which the information density of the memory is increased relative to a conventional nonvolatile memory that includes two logic state devices. Specifically, the nonvolatile memory of the present invention includes a SiN/TaN/SiN thin film resistor embedded within a material having a thermal conductivity of about 1 W/m-K or less; and a non-linear Si-containing device coupled to the resistor. Read and write circuits and operations are also provided in the present application.
摘要翻译:本发明涉及诸如ROM或EPROM的非易失性存储器,其中存储器的信息密度相对于包括两个逻辑状态器件的常规非易失性存储器而增加。 具体地,本发明的非易失性存储器包括嵌入在热导率为约1W / m-K以下的材料中的SiN / TaN / SiN薄膜电阻器; 以及耦合到电阻器的非线性含Si器件。 读写电路和操作也在本申请中提供。
摘要:
The present invention relates to a nonvolatile memory such as, for example a ROM or an EPROM, in which the information density of the memory is increased relative to a conventional nonvolatile memory that includes two logic state devices. Specifically, the nonvolatile memory of the present invention includes a SiN/TaN/SiN thin film resistor embedded within a material having a thermal conductivity of about 1 W/m-K or less; and a non-linear Si-containing device coupled to the resistor. Read and write circuits and operations are also provided in the present application.
摘要翻译:本发明涉及诸如ROM或EPROM的非易失性存储器,其中存储器的信息密度相对于包括两个逻辑状态器件的常规非易失性存储器而增加。 具体地,本发明的非易失性存储器包括嵌入在热导率为约1W / m-K以下的材料中的SiN / TaN / SiN薄膜电阻器; 以及耦合到电阻器的非线性含Si器件。 读写电路和操作也在本申请中提供。
摘要:
An integrated circuit, testing structure, and method for monitoring electro-migration (EM) performance. A method is described that includes method for measuring on-chip electro-migration (EM) performance, including: providing a first on-chip sensor continuously powered with a stress current; providing a second on-chip sensor that is powered only during measurement cycles with a nominal current; obtaining a first resistance measurement from the first on-chip sensor and a second resistance measurement from the second on-chip sensor during each of a series of measurement cycles; and processing the first and second resistance measurements.
摘要:
The present invention provides a method. The method includes operating a plurality of field-effect-transistors (FETs) under a first operation condition; reversing an operation direction for at least one of the plurality of FETs for a brief period of time; measuring a second operation condition of the one of the plurality of FETs during the brief period of time; computing a difference between the second operation condition and a reference operation condition; and providing a reliability indicator based upon the difference between the second and the reference operation conditions, wherein the plurality of FETs are employed in a single integrated circuit (IC).
摘要:
The present invention relates to a nonvolatile memory such as, for example a ROM or an EPROM, in which the information density of the memory is increased relative to a conventional nonvolatile memory that includes two logic state devices. Specifically, the nonvolatile memory of the present invention includes a SiN/TaN/SiN thin film resistor embedded within a material having a thermal conductivity of about 1 W/m-K or less; and a non-linear Si-containing device coupled to the resistor. Read and write circuits and operations are also provided in the present application.
摘要翻译:本发明涉及诸如ROM或EPROM的非易失性存储器,其中存储器的信息密度相对于包括两个逻辑状态器件的常规非易失性存储器而增加。 具体地,本发明的非易失性存储器包括嵌入在热导率为约1W / m-K以下的材料中的SiN / TaN / SiN薄膜电阻器; 以及耦合到电阻器的非线性含Si器件。 读写电路和操作也在本申请中提供。
摘要:
A thermo-mechanical cleavable structure is provided and may be used as a programmable fuse for integrated circuits. As applied to a programmable fuse, the thermo-mechanical cleavable structure includes an electrically conductive cleavable layer adjacent to a thermo-mechanical stressor. As electricity is passed through the cleavable layer, the cleavable layer and the thermo-mechanical stressor are heated and gas evolves from the thermo-mechanical stressor. The gas locally insulates the thermo-mechanical stressor, causing local melting adjacent to the bubbles in the thermo-mechanical stressor and the cleavable structure forming cleaving sites. The melting also interrupts the current flow through the cleavable structure so the cleavable structure cools and contracts. The thermo-mechanical stressor also contracts due to a phase change caused by the evolution of gas therefrom. As the thermo-mechanical cleavable structure cools, the cleaving sites expand causing gaps to be permanently formed therein.