公开(公告)号：US09269809B2

公开(公告)日：2016-02-23

申请号：US14184826

申请日：2014-02-20

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Kai Frohberg ,  Marco Lepper ,  Katrin Reiche

IPC: H01L21/00 ,  H01L29/78 ,  H01L29/417 ,  H01L23/485 ,  H01L21/768

CPC classification number: H01L29/4175 ,  H01L21/76805 ,  H01L21/76814 ,  H01L21/76843 ,  H01L23/485 ,  H01L23/528 ,  H01L23/53209 ,  H01L23/53238 ,  H01L23/53247 ,  H01L23/53266 ,  H01L23/5329 ,  H01L24/05 ,  H01L29/7833 ,  H01L2224/0401 ,  H01L2924/00 ,  H01L2924/0002

Abstract: When forming semiconductor devices with contact plugs comprising protection layers formed on sidewalls of etch stop layers to reduce the risk of shorts, the protection layers may be formed by performing a sputter process to remove material from a contact region and redeposit the removed material on the sidewalls of the etch stop layers.

Abstract translation: 当形成具有接触插塞的半导体器件时，其包括形成在蚀刻停止层的侧壁上的保护层以减少短路的风险，可以通过执行溅射工艺来形成保护层，以从接触区域移除材料并将去除的材料重新沉积在侧壁上 的蚀刻停止层。

公开(公告)号：US08828887B2

公开(公告)日：2014-09-09

申请号：US13687877

申请日：2012-11-28

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Kai Frohberg ,  Frank Feustel ,  Thomas Werner

IPC: H01L21/31 ,  H01L21/8234 ,  H01L21/8238 ,  H01L29/78 ,  H01L21/02 ,  H01L21/84 ,  H01L27/12

CPC classification number: H01L21/02107 ,  H01L21/823412 ,  H01L21/823425 ,  H01L21/823431 ,  H01L21/823475 ,  H01L21/823807 ,  H01L21/823821 ,  H01L21/823871 ,  H01L21/84 ,  H01L21/845 ,  H01L27/1203 ,  H01L27/1211 ,  H01L29/7843 ,  H01L29/785

Abstract: In sophisticated semiconductor devices, an efficient stress decoupling may be accomplished between neighboring transistor elements of a densely packed device region by providing a gap or a stress decoupling region between the corresponding transistors. For example, a gap may be formed in the stress-inducing material so as to reduce the mutual interaction of the stress-inducing material on the closely spaced transistor elements. In some illustrative aspects, the stress-inducing material may be provided as an island for each individual transistor element.

Abstract translation: 在复杂的半导体器件中，通过在对应的晶体管之间提供间隙或应力去耦合区域，可以在紧密堆积的器件区域的相邻晶体管元件之间实现有效的应力去耦合。 例如，可以在应力诱导材料中形成间隙，以便减小紧密间隔的晶体管元件上的应力诱导材料的相互作用。 在一些说明性方面，应力诱导材料可以作为每个单独的晶体管元件的岛来提供。

公开(公告)号：US20130130498A1

公开(公告)日：2013-05-23

申请号：US13718644

申请日：2012-12-18

Applicant: GLOBALFOUNDRIES INC.

Inventor： Frank Feustel ,  Thomas Werner ,  Michael Grillberger ,  Kai Frohberg

IPC: H01L21/768

CPC classification number: H01L21/76877 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/76831 ,  H01L21/76835 ,  H01L23/5226 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2221/1031 ,  H01L2221/1063 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Generally, the present disclosure is related to various techniques that may be used for forming metallization systems in a highly efficient manner by filling via openings and trenches in a common fill process, while reducing negative effects during the patterning of the via opening and the trenches. One illustrative method disclosed herein includes, among other things, forming a via opening in a first dielectric material of a metallization layer of a semiconductor device. Moreover, a second dielectric material is formed above the first dielectric material, wherein the second dielectric material fills the via opening. Furthermore, the method also includes forming a trench in the second dielectric material so as to connect to the via opening, and filling the trench and the via opening with a metal in a common fill process.

Abstract translation: 通常，本公开涉及可以用于通过在公共填充过程中通过开口和沟槽填充而以高效方式形成金属化系统的各种技术，同时在通孔开口和沟槽的图案化期间减少负面影响。 本文公开的一种说明性方法尤其包括在半导体器件的金属化层的第一介电材料中形成通孔。 此外，第二电介质材料形成在第一电介质材料的上方，其中第二介电材料填充通孔。 此外，该方法还包括在第二电介质材料中形成沟槽，以便连接到通孔开口，并在通用填充工艺中用金属填充沟槽和通孔开口。