公开(公告)号：US10432315B2

公开(公告)日：2019-10-01

申请号：US15745709

申请日：2015-07-21

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Janet Chen ,  Cheng Li ,  Marco Fiorentino ,  Raymond G Beausoleil

IPC: G02F1/01 ,  G02B6/293 ,  G02F1/025 ,  H04B10/50 ,  H04B10/67 ,  H04B10/80 ,  H04B10/079 ,  H04B10/2575

Abstract: One example includes an optical transmitter system. The system includes a waveguide to receive and propagate an optical signal. The system also includes a ring modulation system comprising a ring resonator that is optically coupled to the waveguide and is to resonate a given wavelength of the optical signal in response to an input data signal that is provided to a modulation amplifier to provide carrier injection to change a refractive index of the ring resonator to resonate the given wavelength of the optical signal to modulate the optical signal. The system further includes a tuning controller associated with the ring modulation system. The tuning controller can implement iterative feedback tuning of the ring modulation system based on a relative amplitude of an optical intensity of the given wavelength in the ring resonator and a variable reference amplitude to substantially stabilize the ring resonator with respect to the given wavelength.

公开(公告)号：US10333628B2

公开(公告)日：2019-06-25

申请号：US15472766

申请日：2017-03-29

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Cheng Li ,  Marco Fiorentino ,  Raymond G Beausoleil, Sr.

IPC: H04B10/40 ,  H04B10/50 ,  H04B10/60 ,  H04B10/69

Abstract: According to one example, errors in a logical signal from a data slicer are detected and a power supply voltage is adjusted based on the detected errors.

公开(公告)号：US10333516B2

公开(公告)日：2019-06-25

申请号：US15749370

申请日：2015-07-31

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Cheng Li ,  Kunzhi Yu ,  Marco Fiorentino ,  Raymond G Beausoleil

IPC: H04B10/00 ,  H03K17/78 ,  H03F3/08 ,  G01J1/44 ,  H03K17/94 ,  H04B10/69

Abstract: In one example, a device includes a photodetector to generate an electrical signal in response to an optical signal and a transimpedance amplifier unit to receive the electrical signal. In one example, the transimpedance amplifier unit may include a first inverter unit, a second inverter unit coupled to the first inverter unit, and a third inverter unit coupled to the second inverter unit. In one example the third inverter unit may include a feedback resistor and a first n-type transistor in parallel to the feedback resistor, where the first n-type transistor is to provide a variable gain of the third inverter unit.

公开(公告)号：US20190149244A1

公开(公告)日：2019-05-16

申请号：US16231159

申请日：2018-12-21

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Cheng Li ,  Di Liang ,  Kehan Zhu

IPC: H04B10/564 ,  H04L25/03 ,  H04L25/02 ,  H04B10/58 ,  H04B10/54 ,  H04L27/01 ,  H04B10/80 ,  H04B10/50

CPC classification number: H04B10/564 ,  H04B10/504 ,  H04B10/541 ,  H04B10/58 ,  H04B10/801 ,  H04L25/028 ,  H04L25/03885 ,  H04L27/01

Abstract: Examples disclosed herein relate to optical driver circuits. In some of the disclosed examples, an optical driver circuit includes a pre-driver circuit and a main driver circuit. The pre-driver circuit may include a pattern generator and at least one serializer to generate a main modulation signal and an inverted delayed modulation signal. The main driver circuit may include a level controller to control amplitudes of pre-emphasis on rising and falling edges of a modulation signal output and an equalization controller to transition the modulation signal output from the pre-emphasis amplitudes to main modulation amplitudes using the inverted delayed modulation signal.

公开(公告)号：US09917713B2

公开(公告)日：2018-03-13

申请号：US15139779

申请日：2016-04-27

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Kunzhi Yu ,  Cheng Li ,  Marco Fiorentino ,  Raymond G. Beausoleil

IPC: H03D1/00 ,  H04L27/22 ,  H04L27/233 ,  H04L25/06

CPC classification number: H04L27/223 ,  H04L7/033 ,  H04L25/066 ,  H04L25/069 ,  H04L27/2338

Abstract: In one example, an apparatus includes an offset tunable edge slicer having an input to receive a pulse amplitude modulation signal. The offset tunable edge slicer also has a plurality of possible offset settings corresponding to a plurality of different reference voltages of the offset tunable edge slicer. A multiplexer has an output coupled to the input of the offset tunable edge slicer and an input to receive a control signal that selects one of the plurality of possible offset settings for the offset tunable edge slicer. A phase detector has an input coupled to an output of the offset tunable edge slicer.

公开(公告)号：US10680566B2

公开(公告)日：2020-06-09

申请号：US15768864

申请日：2015-10-23

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Cheng Li ,  Zhihong Huang

IPC: H03F3/08 ,  H03F3/30 ,  H03F1/26 ,  H03F1/08

Abstract: One embodiment describes a transimpedance amplifier (TIA) system. The system includes an inverter TIA stage interconnecting an input node and an output node and configured to invert an input signal at the input node to provide a first inverted signal component at the output node. The system also includes a noise-canceling inverter stage arranged in parallel with the inverter stage and being configured to invert the input signal to provide a second inverted signal component and to invert noise from the input node. Thus, the first and second inverted signal components constructively combine at the output node and the noise is substantially mitigated at the output node.

公开(公告)号：US10673535B2

公开(公告)日：2020-06-02

申请号：US16085364

申请日：2016-04-14

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Cheng Li ,  Kunzhi Yu ,  Marco Fiorentino ,  Raymond G. Beausoleil

IPC: H04B10/69 ,  H04B10/516 ,  H04B10/63 ,  H04L25/49

Abstract: An example optical receiver may have an optical receiver front-end, four slicers, and a logic block. The optical receiver front-end may include a transimpedance amplifier to convert a photodiode output signal to a voltage signal. Three of the slicers may be data slicers, and one of the slicers may be an edge slicer. The slicers may each: shift the voltage signal based on an offset voltage set for the respective slicer, determine whether the shifted voltage signal is greater than a threshold value and generate a number of comparison signals based on the determining, and generate multiple digital signals by demuxing the comparison signals. The logic block may perform PAM-4 to binary decoding based on the data signals output by the data slicers and clock-and-data-recovery based on the digital signals output by the edge slicer.

公开(公告)号：US10651942B2

公开(公告)日：2020-05-12

申请号：US16275727

申请日：2019-02-14

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Cheng Li ,  Jim Huang ,  Ashkan Seyedi ,  Marco Fiorentino ,  Raymond G. Beausoleil

IPC: H04B10/00 ,  H04B10/50 ,  G02F1/225 ,  G02F1/01 ,  G02F1/21

Abstract: One example includes a bias-based Mach-Zehnder modulation (MZM) system. The system includes a Mach-Zehnder modulator to receive and split an optical input signal and to provide an intensity-modulated optical output signal based on a high-frequency data signal to modulate a relative phase of the split optical input signal to transmit data and based on a bias voltage to modulate the relative phase of the split optical input signal to tune the Mach-Zehnder modulator. The system also includes a bias feedback controller to compare a detection voltage associated with the intensity-modulated output signal with a reference voltage to measure an extinction ratio associated with an optical power of the intensity-modulated optical output signal and to adjust the bias voltage based on the comparison to substantially maximize the extinction ratio.

公开(公告)号：US10432319B2

公开(公告)日：2019-10-01

申请号：US15768975

申请日：2015-10-29

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Kehan Zhu ,  Cheng Li ,  Marco Fiorentino

IPC: H04B10/00 ,  H04B10/69 ,  H04B10/2507 ,  H04B10/25 ,  H04L25/49 ,  H04J14/00

Abstract: One example of a receiver includes a first stage, a second stage, a third stage, and an automatic gain controller. The first stage amplifies an input signal to provide a first signal. The second stage amplifies or attenuates the first signal to provide a second signal based on a tunable gain of the second stage. The tunable gain is adjusted in response to a differential signal. The third stage amplifies the second signal to provide an output signal. The automatic gain controller provides the differential signal based on a comparison between a peak voltage of the output signal and the sum of a common mode voltage of the output signal and an offset voltage.

公开(公告)号：US10431707B2

公开(公告)日：2019-10-01

申请号：US15560649

申请日：2015-04-30

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Cheng Li ,  Zhihong Huang ,  Marco Fiorentino ,  Raymond G. Beausoleil

IPC: H01L31/10 ,  H01L31/107 ,  H04B10/00 ,  H01L25/04 ,  H01L27/146 ,  H04B10/69

Abstract: An example device in accordance with an aspect of the present disclosure includes an avalanche photodetector to enable carrier multiplication for increased responsivity, and a receiver based on source-synchronous CMOS and including adaptive equalization. The photodetector and receiver are monolithically integrated on a single chip.