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公开(公告)号：US10386698B2
公开(公告)日：2019-08-20
申请号：US15565281
申请日：2015-05-08
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： Charles M. Santori , Jason Pelc , Ranojoy Bose , Cheng Li , Raymond G Beausoleil
Abstract: In the examples provided herein, an optical logic gate includes multiple couplers, where no more than two types of couplers are used in the optical logic gate, and further wherein the two types of couplers consist of: a 3-dB coupler and a weak coupler with a given transmission-to-reflection ratio. The optical logic gate also includes a first resonator, wherein the first resonator comprises a photonic crystal resonator or a nonlinear ring resonator, wherein in operation, the first resonator has a dedicated continuous wave input to bias a complex amplitude of a total field input to the first resonator such that the total field input is either above or below a nonlinear switching threshold of the first resonator, where the optical logic gate is an integrated photonic circuit.
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公开(公告)号：US10074005B2
公开(公告)日：2018-09-11
申请号：US15179156
申请日：2016-06-10
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Chin-Hui Chen , Tsung-Ching Huang , Zhihong Huang , Raymond G Beausoleil
IPC: G06K9/00
CPC classification number: G06K9/00087 , G06K9/00013 , G06K9/00114 , G06K9/00885 , G06K9/00986 , G06K9/2036 , G06K2009/00932
Abstract: In the examples provided herein, a vascular pattern recognition system integrated onto a portable card includes a vascular pattern detection system to obtain image data of blood vessels of a finger to be swiped across a detection area on the portable card, wherein the vascular pattern detection system includes a near infrared light source and an image sensor array. The vascular pattern recognition system also includes an image processor to process the image data to generate a scanned vascular pattern and compare the scanned vascular pattern to a pre-stored pattern stored on the portable card to authenticate the image data, and a security processor to generate a transaction code to authorize a transaction upon authentication of the image data.
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公开(公告)号：US11579677B2
公开(公告)日：2023-02-14
申请号：US16062882
申请日：2015-12-18
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： Miao Hu , Tsung-Ching Huang , Chin-Hui Chen , Raymond G Beausoleil , John Paul Strachan
IPC: G06F1/3206 , G11C13/00 , G11C27/00 , G11C11/56 , G06F1/3234 , G06N3/04
Abstract: In one example, a device to process analog sensor data is described. For example, a device may include at least one analog sensor to generate a first set of analog voltage signals and a crossbar array including a plurality of memristors. In one example, the crossbar array is to receive an input vector of the first set of analog voltage signals, generate an output vector comprising a second set of analog voltage signals that is based upon a dot product of the input vector and a matrix comprising resistance values of the plurality of memristors, detect a pattern of the output vector, and activate a processor upon a detection of the pattern.
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公开(公告)号：US10436956B2
公开(公告)日：2019-10-08
申请号：US15224417
申请日：2016-07-29
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： David A Fattal , Jingjing Li , Raymond G Beausoleil , Marco Fiorentino
Abstract: Examples include a method for fabricating a grating mirror using a computing device that comprises calculating a target phase change across the grating mirror. The target phase change may correspond to a target wavefront shape in a beam of light reflected from a grating patter. The method may also comprise generating the grating pattern comprising a plurality of lines with line widths, line period spacings, and line thicknesses corresponding to the target phase change across the grating mirror using the computing device. In such examples, a set of coordinates may be generated using the computing device with each coordinate identifying a location of a line of the plurality of lines, a line width of the line, a line period spacing of the line, and a line thickness of the line.
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Patent Agency Ranking
公开(公告)号：US10261256B2
公开(公告)日：2019-04-16
申请号：US15546283
申请日：2015-01-28
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： Raymond G Beausoleil , Marco Fiorentino , Jason Pelc , Charles M Santori , Terrel L Morris
Abstract: One example includes an apparatus that includes a plurality of input/output (I/O) ports and a body portion. The plurality of I/O ports can be arranged at a plurality of peripheral surfaces of the body portion. The body portion includes a solid dielectric material having a substantially constant index of refraction. The body portion also includes parallel planar surfaces spaced apart by and bounded by the plurality of peripheral surfaces. The solid dielectric material in the body portion can be writable via a laser-writing process to form an optical waveguide extending between a set of the plurality of I/O ports.
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公开(公告)号：US20180106967A1
公开(公告)日：2018-04-19
申请号：US15565281
申请日：2015-05-08
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： Charles M. Santori , Jason Pelc , Ranojoy Bose , Cheng Li , Raymond G Beausoleil
CPC classification number: G02F3/00 , G02B6/12004 , G02F1/3515 , G02F1/3521 , G02F3/024 , G02F2203/15
Abstract: In the examples provided herein, an optical logic gate includes multiple couplers, where no more than two types of couplers are used in the optical logic gate, and further wherein the two types of couplers consist of: a 3-dB coupler and a weak coupler with a given transmission-to-reflection ratio. The optical logic gate also includes a first resonator, wherein the first resonator comprises a photonic crystal resonator or a nonlinear ring resonator, wherein in operation, the first resonator has a dedicated continuous wave input to bias a complex amplitude of a total field input to the first resonator such that the total field input is either above or below a nonlinear switching threshold of the first resonator, where the optical logic gate is an integrated photonic circuit.
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公开(公告)号：US09846277B1
公开(公告)日：2017-12-19
申请号：US15222922
申请日：2016-07-28
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： Yingtao Hu , Di Liang , Raymond G Beausoleil
CPC classification number: G02B6/122
Abstract: Examples herein relate to semiconductor devices having contacts that provide low contact resistance for both p-type and n-type materials. An example semiconductor device includes a semiconductor device layer having at least one of a p-type material or a n-type material. A contact is manufactured on the semiconductor device layer with a complementary metal-oxide-semiconductor process. The contact includes a first layer having palladium coupled with a surface of the semiconductor device layer, a conducting second layer coupled with the first layer, and a third layer having germanium coupled with the second conducting layer.
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公开(公告)号：US20170357843A1
公开(公告)日：2017-12-14
申请号：US15179156
申请日：2016-06-10
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Chin-Hui Chen , Tsung-Ching Huang , Zhihong Huang , Raymond G Beausoleil
IPC: G06K9/00
CPC classification number: G06K9/00087 , G06K9/00013 , G06K9/00114 , G06K9/00885
Abstract: In the examples provided herein, a vascular pattern recognition system integrated onto a portable card includes a vascular pattern detection system to obtain image data of blood vessels of a finger to be swiped across a detection area on the portable card, wherein the vascular pattern detection system includes a near infrared light source and an image sensor array. The vascular pattern recognition system also includes an image processor to process the image data to generate a scanned vascular pattern and compare the scanned vascular pattern to a pre-stored pattern stored on the portable card to authenticate the image data, and a security processor to generate a transaction code to authorize a transaction upon authentication of the image data.
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公开(公告)号：US09829727B2
公开(公告)日：2017-11-28
申请号：US15305930
申请日：2014-05-07
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： Zhihong Huang , Di Liang , Zhen Peng , Raymond G Beausoleil
CPC classification number: G02F1/065 , G02B6/122 , G02B6/29341 , G02B2006/12061 , G02B2006/12085 , G02B2006/12142 , G02F1/0018 , G02F1/025 , G02F2201/12 , G02F2202/022 , G02F2202/103 , G02F2202/105 , G02F2203/055 , G02F2203/15
Abstract: A polymer-clad optical modulator includes a substrate comprising an insulating material; a silicon microring on the substrate; silicon waveguides on the substrate adjacent the silicon microring; an electro-optic polymer covering the silicon microring and the silicon waveguide; and an electrical contact on top of the electro-optic polymer. The silicon microring or a portion of an adjacent silicon layer is lightly doped. A polymer-clad depletion type optical modulator and a polymer-clad carrier injection type optical modulator, each employing the lightly doped silicon microring or an adjacent lightly doped silicon layer, are also described.
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