公开(公告)号：US08462549B2

公开(公告)日：2013-06-11

申请号：US13001278

申请日：2009-06-30

申请人： Erich F. Haratsch ,  Milos Ivkovic ,  Victor Krachkovsky ,  Nenad Miladinovic ,  Andrei Vityaev ,  Johnson Yen

发明人： Erich F. Haratsch ,  Milos Ivkovic ,  Victor Krachkovsky ,  Nenad Miladinovic ,  Andrei Vityaev ,  Johnson Yen

IPC分类号： G11C11/34

CPC分类号： G11C16/3427 ,  G06F11/1072 ,  G11C5/00 ,  G11C7/02 ,  G11C7/1006 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/10 ,  G11C16/3418

摘要： Methods and apparatus are provided for read-side intercell interference mitigation in flash memories. A flash memory device is read by obtaining a read value for at least one target cell; obtaining a value representing a voltage stored in at least one aggressor cell that was programmed after the target cell; determining intercell interference for the target cell from the at least one aggressor cell; and obtaining a new read value that compensates for the intercell interference by removing the determined intercell interference from the read value for the at least one target cell. The new read value can optionally be provided to a decoder. In an iterative implementation, one or more intercell interference mitigation parameters can be adjusted if a decoding error occurs.

摘要翻译： 提供了用于闪速存储器中的读侧细胞间干扰减轻的方法和装置。 通过获得至少一个目标单元的读取值来读取闪速存储器件; 获得代表在目标小区之后编程的至少一个攻击者小区中存储的电压的值; 从所述至少一个侵略者小区确定所述目标小区的小区间干扰; 以及通过从所述至少一个目标小区的读取值中去除所确定的小区间干扰来获得补偿小区间干扰的新的读取值。 可以可选地将新的读取值提供给解码器。 在迭代实现中，如果发生解码错误，则可以调整一个或多个小区间干扰减轻参数。

公开(公告)号：US20110141808A1

公开(公告)日：2011-06-16

申请号：US13001295

申请日：2009-07-21

申请人： Erich F. Haratsch ,  Milos Ivkovic ,  Victor Krachkovsky ,  Nenad Miladinovic ,  Andrei Vityaev ,  Johnson Yen

发明人： Erich F. Haratsch ,  Milos Ivkovic ,  Victor Krachkovsky ,  Nenad Miladinovic ,  Andrei Vityaev ,  Johnson Yen

IPC分类号： G11C16/04

CPC分类号： G11C16/10 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/3418 ,  G11C16/3427 ,  G11C16/3454 ,  G11C2211/5621

摘要： Methods and apparatus are provided for programming multiple program values per signal level in flash memories. A flash memory device having a plurality of program values is programmed by programming the flash memory device for a given signal level, wherein the programming step comprises a programming phase and a plurality of verify phases. In another variation, a flash memory device having a plurality of program values is programmed, and the programming step comprises a programming phase and a plurality of verify phases, wherein at least one signal level comprises a plurality of the program values. The signal levels or the program values (or both) can be represented using one or more of a voltage, a current and a resistance.

摘要翻译： 提供了用于在闪速存储器中编程每个信号电平的多个程序值的方法和装置。 具有多个编程值的闪速存储器件通过针对给定的信号电平对闪速存储器件进行编程来编程，其中编程步骤包括编程阶段和多个验证阶段。 在另一个实施例中，编程具有多个编程值的闪速存储器件，并且编程步骤包括编程阶段和多个验证阶段，其中至少一个信号电平包括多个程序值。 可以使用电压，电流和电阻中的一个或多个来表示信号电平或程序值（或两者）。

公开(公告)号：US08788923B2

公开(公告)日：2014-07-22

申请号：US13001317

申请日：2009-06-30

申请人： Erich F. Haratsch ,  Milos Ivkovic ,  Victor Krachkovsky ,  Nenad Miladinovic ,  Andrei Vityaev ,  Johnson Yen

发明人： Erich F. Haratsch ,  Milos Ivkovic ,  Victor Krachkovsky ,  Nenad Miladinovic ,  Andrei Vityaev ,  Johnson Yen

IPC分类号： G06F11/00 ,  H03M13/00 ,  G11C16/34 ,  G11C5/00 ,  G06F11/10

CPC分类号： G11C16/3427 ,  G06F11/1072 ,  G11C5/00 ,  G11C7/02 ,  G11C7/1006 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/10 ,  G11C16/3418

摘要： Methods and apparatus are provided for soft demapping and intercell interference mitigation in flash memories. In one variation, a target cell in a flash memory device capable of storing at least two data levels, s, per cell is read by obtaining a measured read value, r, for at least one target cell in the flash memory; obtaining a value, h, representing data stored for at least one aggressor cell in the flash memory; selecting one or more probability density functions based on a pattern of values stored in at least a portion of the flash memory, wherein the probability density functions comprises pattern-dependent disturbance of one or more aggressor cells on the at least one target cell in the flash memory; evaluating at least one selected probability density function based on the measured read value, r; and computing one or more log likelihood ratios based on a result of the evaluating step.

摘要翻译： 提供了用于闪存中的软解映射和小区间干扰减轻的方法和装置。 在一个实施例中，通过为闪速存储器中的至少一个目标单元获得测量的读取值r来读取能够存储每个单元的至少两个数据电平s的闪速存储器件中的目标单元; 获得表示对闪速存储器中的至少一个侵略者单元存储的数据的值h; 基于存储在所述闪速存储器的至少一部分中的值的模式来选择一个或多个概率密度函数，其中所述概率密度函数包括所述闪存中的所述至少一个目标小区上的一个或多个攻击者小区的模式相关干扰 记忆; 基于测量的读取值r来评估至少一个所选择的概率密度函数; 以及基于所述评估步骤的结果计算一个或多个对数似然比。

公开(公告)号：US20110305082A1

公开(公告)日：2011-12-15

申请号：US13063888

申请日：2009-09-30

申请人： Erich F. Haratsch ,  Milos Ivkovic ,  Victor Krachkovsky ,  Nenad Miladinovic ,  Andrei Vityaev ,  Clifton Williamson ,  Johnson Yen

发明人： Erich F. Haratsch ,  Milos Ivkovic ,  Victor Krachkovsky ,  Nenad Miladinovic ,  Andrei Vityaev ,  Clifton Williamson ,  Johnson Yen

IPC分类号： G11C16/04

CPC分类号： G11C16/26 ,  G06F11/1012 ,  G06F11/1068 ,  G06F12/0246 ,  G06F2212/1032 ,  G06F2212/2022 ,  G11C7/02 ,  G11C7/04 ,  G11C11/16 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/3418 ,  G11C2211/5634

摘要： Methods and apparatus are provided for soft data generation for memory devices. At least one soft data value is generated for a memory device, by obtaining at least one hard read value; and generating the soft data value associated with the at least one hard read value based on statistics for reading the hard read value. The hard read value may be one or more of data bits, voltage levels, current levels and resistance levels. The generated soft data value may be one or more of (i) a soft read value that is used to generate one or more log likelihood ratios, and (ii) one or more log likelihood ratios. The statistics comprise one or more of bit-based statistics and cell-based statistics. The statistics may also optionally comprise pattern-dependent disturbance of at least one aggressor cell on the target cell, as well as location-specific statistics. At least one soft data value can be generated for a memory device, by obtaining a soft read value; and generating the soft data value associated with the soft read value based on statistics for reading the soft read value, wherein the statistics comprise one or more of location-specific statistics and pattern-dependent statistics.

摘要翻译： 提供了用于存储器件的软数据生成的方法和装置。 通过获得至少一个硬读取值，为存储器件生成至少一个软数据值; 以及基于用于读取硬读取值的统计量来生成与所述至少一个硬读取值相关联的软数据值。 硬读取值可以是数据位，电压电平，电流电平和电阻电平中的一个或多个。 所产生的软数据值可以是（i）用于产生一个或多个对数似然比的软读取值的一个或多个，以及（ii）一个或多个对数似然比。 统计信息包括基于位的统计信息和基于单元的统计信息中的一个或多个。 统计还可以任选地包括目标小区上的至少一个攻击者小区的模式相关干扰，以及位置特定统计。 可以通过获得软读取值来为存储器件生成至少一个软数据值; 以及基于用于读取所述软读取值的统计信息来生成与所述软读取值相关联的软数据值，其中所述统计信息包括位置特定统计信息和模式相关统计信息中的一个或多个。

公开(公告)号：US20110145487A1

公开(公告)日：2011-06-16

申请号：US13001317

申请日：2009-06-30

申请人： Erich F. Haratsch ,  Milos Ivkovic ,  Victor Krachkovsky ,  Nenad Miladinovic ,  Andrei Vityaev ,  Johnson Yen

发明人： Erich F. Haratsch ,  Milos Ivkovic ,  Victor Krachkovsky ,  Nenad Miladinovic ,  Andrei Vityaev ,  Johnson Yen

IPC分类号： G06F12/02

CPC分类号： G11C16/3427 ,  G06F11/1072 ,  G11C5/00 ,  G11C7/02 ,  G11C7/1006 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/10 ,  G11C16/3418

摘要： Methods and apparatus are provided for soft demapping and intercell interference mitigation in flash memories. In one variation, a target cell in a flash memory device capable of storing at least two data levels, s, per cell is read by obtaining a measured read value, r, for at least one target cell in the flash memory; obtaining a value, h, representing data stored for at least one aggressor cell in the flash memory; selecting one or more probability density functions based on a pattern of values stored in at least a portion of the flash memory, wherein the probability density functions comprises pattern-dependent disturbance of one or more aggressor cells on the at least one target cell in the flash memory; evaluating at least one selected probability density function based on the measured read value, r; and computing one or more log likelihood ratios based on a result of the evaluating step.

摘要翻译： 提供了用于闪存中的软解映射和小区间干扰减轻的方法和装置。 在一个实施例中，通过为闪速存储器中的至少一个目标单元获得测量的读取值r来读取能够存储每个单元的至少两个数据电平s的闪速存储器件中的目标单元; 获得表示对闪速存储器中的至少一个侵略者单元存储的数据的值h; 基于存储在所述闪速存储器的至少一部分中的值的模式来选择一个或多个概率密度函数，其中所述概率密度函数包括所述闪存中的所述至少一个目标小区上的一个或多个攻击者小区的模式相关干扰 记忆; 基于测量的读取值r来评估至少一个所选择的概率密度函数; 以及基于所述评估步骤的结果计算一个或多个对数似然比。

公开(公告)号：US20110141815A1

公开(公告)日：2011-06-16

申请号：US13001278

申请日：2009-06-30

申请人： Erich F. Haratsch ,  Milos Ivkovic ,  Victor Krachkovsky ,  Nenad Miladinovic ,  Andrei Vityaev ,  Johnson Yen

发明人： Erich F. Haratsch ,  Milos Ivkovic ,  Victor Krachkovsky ,  Nenad Miladinovic ,  Andrei Vityaev ,  Johnson Yen

IPC分类号： G11C16/26

CPC分类号： G11C16/3427 ,  G06F11/1072 ,  G11C5/00 ,  G11C7/02 ,  G11C7/1006 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/10 ,  G11C16/3418

摘要： Methods and apparatus are provided for read-side intercell interference mitigation in flash memories, A flash memory device is read by obtaining a read value for at least one target cell; obtaining a value representing a voltage stored in at least one aggressor cell that was programmed after the target cell; determining intercell interference for the target cell from the at least one aggressor cell; and obtaining a new read value that compensates for the intercell interference by removing the determined intercell interference from the read value for the at least one target cell. The new read value can optionally be provided to a decoder. In an iterative implementation, one or more intercell interference mitigation parameters can be adjusted if a decoding error occurs.

摘要翻译： 提供了用于闪速存储器中的读侧细胞间干扰减轻的方法和装置。通过获得至少一个目标单元的读取值来读取闪速存储器件; 获得代表在目标小区之后编程的至少一个攻击者小区中存储的电压的值; 从所述至少一个侵略者小区确定所述目标小区的小区间干扰; 以及通过从所述至少一个目标小区的读取值中去除所确定的小区间干扰来获得补偿小区间干扰的新的读取值。 可以可选地将新的读取值提供给解码器。 在迭代实现中，如果发生解码错误，则可以调整一个或多个小区间干扰减轻参数。

公开(公告)号：US20110216586A1

公开(公告)日：2011-09-08

申请号：US13001310

申请日：2009-06-30

申请人： Nils Graef ,  Erich F. Haratsch ,  Milos Ivkovic ,  Victor Krachkovsky ,  Andrei Vityaev ,  Johnson Yen

发明人： Nils Graef ,  Erich F. Haratsch ,  Milos Ivkovic ,  Victor Krachkovsky ,  Andrei Vityaev ,  Johnson Yen

IPC分类号： G11C16/12 ,  G11C16/04 ,  G11C16/26

CPC分类号： G11C16/3427 ,  G06F11/1072 ,  G11C5/00 ,  G11C7/02 ,  G11C7/1006 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/10 ,  G11C16/3418

摘要： Methods and apparatus are provided for intercell interference mitigation using modulation coding. During programming of a flash memory, a modulation encoding is performed that selects one or more levels for programming the flash memory such that a reduced number of cells in the flash memory are programmed with a value that violates one or more predefined criteria. During a reading of a flash memory, a modulation decoding is performed that assigns one or more levels to cells in the flash memory such that a reduced number of cells in the flash memory are read with a value that violates one or more predefined criteria. The predefined criteria can be based, for example, on one or more of an amount of disturbance caused by the programmed cell; a voltage shift of a programmed cell: a voltage stored by a programmed cell; an amount of change in current through a programmed cell; and an amount of current through a programmed cell.

摘要翻译： 提供了使用调制编码的小区间干扰减轻的方法和装置。 在闪速存储器的编程期间，执行调制编码，其选择用于编程闪速存储器的一个或多个级别，使得闪存中的减少数量的单元被编程为具有违反一个或多个预定标准的值。 在读取闪速存储器期间，执行调制解码，其向闪存中的单元分配一个或多个电平，使得闪存中的单元数目减少，其值违反一个或多个预定准则。 预定义的标准可以例如基于由编程的小区引起的干扰量的一个或多个; 编程单元的电压偏移：由编程单元存储的电压; 通过编程单元的电流变化量; 以及通过编程单元的电流量。

公开(公告)号：US08797795B2

公开(公告)日：2014-08-05

申请号：US13001310

申请日：2009-06-30

申请人： Nils Graef ,  Erich F. Haratsch ,  Milos Ivkovic ,  Victor Krachkovsky ,  Andrei Vityaev ,  Johnson Yen

发明人： Nils Graef ,  Erich F. Haratsch ,  Milos Ivkovic ,  Victor Krachkovsky ,  Andrei Vityaev ,  Johnson Yen

IPC分类号： G11C16/04

CPC分类号： G11C16/3427 ,  G06F11/1072 ,  G11C5/00 ,  G11C7/02 ,  G11C7/1006 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/10 ,  G11C16/3418

摘要： Methods and apparatus are provided for intercell interference mitigation using modulation coding. During programming of a flash memory, a modulation encoding is performed that selects one or more levels for programming the flash memory such that a reduced number of cells in the flash memory are programmed with a value that violates one or more predefined criteria. During a reading of a flash memory, a modulation decoding is performed that assigns one or more levels to cells in the flash memory such that a reduced number of cells in the flash memory are read with a value that violates one or more predefined criteria. The predefined criteria can be based, for example, on one or more of an amount of disturbance caused by the programmed cell; a voltage shift of a programmed cell: a voltage stored by a programmed cell; an amount of change in current through a programmed cell; and an amount of current through a programmed cell.

摘要翻译： 提供了使用调制编码的小区间干扰减轻的方法和装置。 在闪速存储器的编程期间，执行调制编码，其选择用于编程闪速存储器的一个或多个级别，使得闪存中的减少数量的单元被编程为具有违反一个或多个预定标准的值。 在读取闪速存储器期间，执行调制解码，其将一个或多个级别分配给闪速存储器中的单元，使得闪存中的小数量的单元以违反一个或多个预定准则的值被读取。 预定义的标准可以例如基于由编程的小区引起的干扰量的一个或多个; 编程单元的电压偏移：由编程单元存储的电压; 通过编程单元的电流变化量; 以及通过编程单元的电流量。

公开(公告)号：US08429500B2

公开(公告)日：2013-04-23

申请号：US12751960

申请日：2010-03-31

申请人： Erich F. Haratsch ,  Nenad Miladinovic ,  Andrei Vityaev

发明人： Erich F. Haratsch ,  Nenad Miladinovic ,  Andrei Vityaev

IPC分类号： G11C29/00

CPC分类号： H03M13/612 ,  H03M13/1102 ,  H03M13/2957 ,  H03M13/3905 ,  H03M13/41 ,  H03M13/4138 ,  H04L1/005

摘要： Methods and apparatus are provided for computing a probability value of a received value in communication or storage systems. A probability value for a received value in a communication system or a memory device is computed by obtaining at least one received value; identifying a segment of a function corresponding to the received value, wherein the function is defined over a plurality of segments, wherein each of the segments has an associated set of parameters; and calculating the probability value using the set of parameters associated with the identified segment. A probability value for a received value in a communication system or a memory device can also be computed by calculating the probability value for the received value using a first distribution, wherein the first distribution is predefined and wherein a mapped version of the first distribution approximates a distribution of the received values and wherein the calculating step is implemented by a processor, a controller, a read channel, a signal processing unit or a decoder.

摘要翻译： 提供了用于计算通信或存储系统中的接收值的概率值的方法和装置。 通过获得至少一个接收值来计算通信系统或存储设备中的接收值的概率值; 识别对应于所接收的值的功能的片段，其中所述功能在多个片段上被定义，其中所述片段中的每个片段具有相关联的参数组; 以及使用与所识别的段相关联的参数集来计算概率值。 也可以通过使用第一分布计算接收值的概率值来计算通信系统或存储器件中的接收值的概率值，其中第一分布是预定义的，并且其中第一分布的映射版本近似于 分配接收值，其中计算步骤由处理器，控制器，读通道，信号处理单元或解码器来实现。

公开(公告)号：US20110246842A1

公开(公告)日：2011-10-06

申请号：US12751973

申请日：2010-03-31

申请人： Erich F. Haratsch ,  Nenad Miladinovic ,  Andrei Vityaev

发明人： Erich F. Haratsch ,  Nenad Miladinovic ,  Andrei Vityaev

IPC分类号： G06F11/25 ,  G06F11/22

CPC分类号： G11C11/5642 ,  G11C16/3454

摘要： Methods and apparatus are provided for approximating a probability density function or distribution for a received value in communication or storage systems. A target distribution is approximated for a received value in one or more of a communication system and a memory device, by substantially minimizing a squared error between the target distribution of the received values and a second distribution obtained by mapping a predefined distribution, such as a Gaussian distribution, through a mapping function, wherein the second distribution has an associated set of parameters. The mapping function can be, for example, a piecewise linear function. The second distribution has a plurality of segments and each of the segments has an associated set of parameters. The associated set of parameters can be used to compute probability values, soft data values or log likelihood ratios.

摘要翻译： 提供了用于近似通信或存储系统中的接收值的概率密度函数或分布的方法和装置。 通过基本上最小化接收到的值的目标分布与通过映射预定义分布而获得的第二分布之间的平方误差来实现对一个或多个通信系统和存储设备中的接收值的目标分布近似， 高斯分布，通过映射函数，其中第二分布具有相关联的参数集合。 映射函数可以是例如分段线性函数。 第二分布具有多个段，并且每个段具有相关的一组参数。 相关的参数集可用于计算概率值，软数据值或对数似然比。