公开(公告)号：US20120104405A1

公开(公告)日：2012-05-03

申请号：US13285584

申请日：2011-10-31

申请人： Hee-Dong CHOI ,  Ki-Sul Cho ,  Seong-Moh Seo

发明人： Hee-Dong CHOI ,  Ki-Sul Cho ,  Seong-Moh Seo

IPC分类号： H01L33/08 ,  H01L33/16

CPC分类号： H01L29/4908 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/3246 ,  H01L27/3265 ,  H01L2227/323

摘要： A method of fabricating an array substrate for an organic electroluminescent device includes forming a semiconductor layer of polysilicon in an element region, and a semiconductor pattern of polysilicon in a storage region on a substrate; forming a multiple-layered gate electrode corresponding to a center portion of the semiconductor layer and a first storage electrode corresponding to the semiconductor pattern; performing an impurity-doping to make a portion of the semiconductor layer not covered by the gate electrode into an ohmic contact layer and make the semiconductor pattern into a second storage electrode; forming source and drain electrodes and a third storage electrode corresponding to the first storage electrode; forming a first electrode contacting the drain electrode and a fourth storage electrode corresponding to the third storage electrode.

摘要翻译： 一种制造有机电致发光器件用阵列基板的方法包括：在元件区域中形成多晶硅的半导体层，以及在基板上的存储区域中形成多晶硅的半导体图案; 形成对应于所述半导体层的中心部分的多层栅电极和对应于所述半导体图案的第一存储电极; 进行杂质掺杂，使未被栅电极覆盖的半导体层的一部分成为欧姆接触层，并使半导体图案成为第二存储电极; 形成源极和漏极;以及对应于第一存储电极的第三存储电极; 形成与所述漏电极接触的第一电极和对应于所述第三存储电极的第四存储电极。

公开(公告)号：US20110114962A1

公开(公告)日：2011-05-19

申请号：US12795430

申请日：2010-06-07

申请人： Hee-Dong Choi ,  Seong-Moh Seo

发明人： Hee-Dong Choi ,  Seong-Moh Seo

IPC分类号： H01L33/16 ,  H01L21/336

CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L27/1274

摘要： An array substrate for a display device includes a gate electrode on a substrate; a gate insulating layer on the gate electrode and having the same plane area and the same plane shape as the gate electrode; an active layer on the gate insulating layer and exposing an edge of the gate insulating layer; an interlayer insulating layer on the active layer and including first and second active contact holes, the first and second active contact holes respectively exposing both sides of the active layers; first and second ohmic contact layers contacting the active layer through the first and second active contact holes, respectively; a source electrode on the first ohmic contact layer; a drain electrode on the second ohmic contact layer; a data line on the interlayer insulating layer and connected to the source electrode; a first passivation layer on the source electrode, the drain electrode and the data line, the first passivation layer, the interlayer insulating layer and the gate insulating layer have a first gate contact hole exposing a portion of the gate electrode; a gate line on the first passivation layer and contacting the gate electrode through the first gate contact hole, the gate line crossing the data line; a second passivation layer on the gate line and having a drain contact hole exposing the drain electrode; and a pixel electrode on the second passivation layer and contacting the drain electrode through the contact hole.

摘要翻译： 用于显示装置的阵列基板包括在基板上的栅电极; 栅电极上的栅极绝缘层，并且具有与栅电极相同的平面面积和相同的平面形状; 栅极绝缘层上的有源层，并露出栅极绝缘层的边缘; 所述有源层上的层间绝缘层包括第一和第二有源接触孔，所述第一和第二有源接触孔分别暴露有源层的两侧; 第一和第二欧姆接触层分别通过第一和第二有源接触孔与有源层接触; 在第一欧姆接触层上的源电极; 第二欧姆接触层上的漏电极; 在层间绝缘层上的与源电极连接的数据线; 源电极，漏电极和数据线上的第一钝化层，第一钝化层，层间绝缘层和栅极绝缘层具有暴露栅电极的一部分的第一栅极接触孔; 在第一钝化层上的栅极线，并通过第一栅极接触孔与栅电极接触，栅极线与数据线交叉; 栅极线上的第二钝化层，并具有暴露漏电极的漏极接触孔; 以及在所述第二钝化层上的像素电极，并且通过所述接触孔与所述漏电极接触。

公开(公告)号：US20060152151A1

公开(公告)日：2006-07-13

申请号：US11297708

申请日：2005-12-08

申请人： Seong-Moh Seo

发明人： Seong-Moh Seo

IPC分类号： H05B33/00

CPC分类号： H01L27/322 ,  H01L27/3244 ,  H01L2251/5315

摘要： An organic light emitting display and a method of fabricating the same are provided. The organic light emitting display includes: a substrate having a plurality of pixel regions; a thin film transistor formed at each pixel region of the substrate and including a semiconductor layer, a gate electrode, and source and drain electrodes; a color filter layer formed on the transistor at each pixel region; a first electrode patterned to be in contact with one of the source and drain electrodes of the thin film transistor through a via-hole in the color filter layer; a pixel defining layer having an opening formed to expose a portion of the first electrode; an emission layer formed on the exposed first electrode; and a second electrode formed on the emission layer over the substrate. Therefore, it is possible to simplify the process by forming the color filter layers between the thin film transistor and the first electrode, without a passivation layer, increase process stability by increasing alignment margin between upper and lower substrates when the color filter layer is adhered, and facilitate top and bottom emission.

摘要翻译： 提供了一种有机发光显示器及其制造方法。 有机发光显示器包括：具有多个像素区域的基板; 形成在所述基板的每个像素区域处的薄膜晶体管，并且包括半导体层，栅极电极和源极和漏极电极; 滤色器层，形成在每个像素区域的晶体管上; 图案化为通过滤色器层中的通孔与薄膜晶体管的源极和漏极之一接触的第一电极; 具有形成为暴露第一电极的一部分的开口的像素限定层; 形成在所述暴露的第一电极上的发射层; 以及形成在衬底上的发射层上的第二电极。 因此，可以通过在薄膜晶体管和第一电极之间形成滤光器层而没有钝化层来简化工艺，通过增加滤色器层粘附时上下基板之间的取向余量来提高工艺稳定性， 并促进顶部和底部的排放。

公开(公告)号：US06833666B2

公开(公告)日：2004-12-21

申请号：US10095111

申请日：2002-03-12

申请人： Seong-Moh Seo ,  Jae-Bon Koo

发明人： Seong-Moh Seo ,  Jae-Bon Koo

IPC分类号： H01J162

CPC分类号： H01L29/66757 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/1288 ,  H01L27/3244 ,  H01L27/3265

摘要： A flat panel display device having a high capacitance and a high aperture ratio. A thin film transistor and a capacitor are formed on an insulating substrate. The thin film transistor includes a semiconductor layer, a gate electrode and source and drain electrodes. The capacitor has first and second capacitor electrodes and a dielectric layer. An insulating layer is formed over the transistor to insulate the gate electrode from the source and drain electrodes, and a portion of the insulating layer is formed as the dielectric layer between the first and second capacitor electrodes. A non-planar shape of the first capacitor electrode and a conforming shape of the dielectric layer and a second capacitor electrode increase a capacitance of the capacitor. The portion of the insulating layer serving as the capacitor dielectric is formed to be thinner than the portion of the insulating layer formed over the gate electrode.

摘要翻译： 具有高电容和高开口率的平板显示装置。 在绝缘基板上形成薄膜晶体管和电容器。 薄膜晶体管包括半导体层，栅极电极和源极和漏极。 电容器具有第一和第二电容器电极和电介质层。 在晶体管上形成绝缘层以使栅电极与源电极和漏电极绝缘，并且绝缘层的一部分形成为第一和第二电容器电极之间的电介质层。 第一电容器电极的非平面形状和电介质层和第二电容器电极的适形形状增加了电容器的电容。 用作电容器电介质的绝缘层的部分形成为比形成在栅电极上的绝缘层的部分更薄。

公开(公告)号：US20050189578A1

公开(公告)日：2005-09-01

申请号：US11063730

申请日：2005-02-24

申请人： Seong-Moh Seo ,  Jae-Bon Koo

发明人： Seong-Moh Seo ,  Jae-Bon Koo

IPC分类号： H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L27/13 ,  H01L27/32 ,  H01L31/119

CPC分类号： H01L29/66757 ,  H01L27/1255 ,  H01L27/1288 ,  H01L27/3244

摘要： A flat panel display device having a high capacitance and a high aperture ratio. A thin film transistor and a capacitor are formed on an insulating substrate. The thin film transistor includes a semiconductor layer, a gate electrode and source and drain electrodes. The capacitor has first and second capacitor electrodes and a dielectric layer. An insulating layer is formed over the transistor to insulate the gate electrode from the source and drain electrodes, and a portion of the insulating layer is formed as the dielectric layer between the first and second capacitor electrodes. A non-planar shape of the first capacitor electrode and a conforming shape of the dielectric layer and a second capacitor electrode increase a capacitance of the capacitor. The portion of the insulating layer serving as the capacitor dielectric is formed to be thinner than the portion of the insulating layer formed over the gate electrode.

公开(公告)号：US07285459B2

公开(公告)日：2007-10-23

申请号：US11063730

申请日：2005-02-24

申请人： Seong-Moh Seo ,  Jae-Bon Koo

发明人： Seong-Moh Seo ,  Jae-Bon Koo

IPC分类号： H01L21/8244 ,  H01L21/8242 ,  H01L21/339 ,  H01L21/84 ,  H01L51/00

CPC分类号： H01L29/66757 ,  H01L27/1255 ,  H01L27/1288 ,  H01L27/3244

摘要： A flat panel display device having a high capacitance and a high aperture ratio. A thin film transistor and a capacitor are formed on an insulating substrate. The thin film transistor includes a semiconductor layer, a gate electrode and source and drain electrodes. The capacitor has first and second capacitor electrodes and a dielectric layer. An insulating layer is formed over the transistor to insulate the gate electrode from the source and drain electrodes, and a portion of the insulating layer is formed as the dielectric layer between the first and second capacitor electrodes. A non-planar shape of the first capacitor electrode and a conforming shape of the dielectric layer and a second capacitor electrode increase a capacitance of the capacitor. The portion of the insulating layer serving as the capacitor dielectric is formed to be thinner than the portion of the insulating layer formed over the gate electrode.

摘要翻译： 具有高电容和高开口率的平板显示装置。 在绝缘基板上形成薄膜晶体管和电容器。 薄膜晶体管包括半导体层，栅极电极和源极和漏极。 电容器具有第一和第二电容器电极和电介质层。 在晶体管上形成绝缘层以使栅电极与源电极和漏电极绝缘，并且绝缘层的一部分形成为第一和第二电容器电极之间的电介质层。 第一电容器电极的非平面形状和电介质层和第二电容器电极的适形形状增加了电容器的电容。 用作电容器电介质的绝缘层的部分形成为比形成在栅电极上的绝缘层的部分更薄。

公开(公告)号：US20050263761A1

公开(公告)日：2005-12-01

申请号：US11124124

申请日：2005-05-09

申请人： Chang-Soo Kim ,  Tae-Wook Kang ,  Chang-Yong Jeong ,  Jae-Young Oh ,  Sang-Il Park ,  Seong-Moh Seo

发明人： Chang-Soo Kim ,  Tae-Wook Kang ,  Chang-Yong Jeong ,  Jae-Young Oh ,  Sang-Il Park ,  Seong-Moh Seo

IPC分类号： G02F1/1368 ,  G02F1/136 ,  G09F9/30 ,  H01L21/00 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L27/32 ,  H01L29/04 ,  H01L29/10 ,  H01L29/15 ,  H01L29/745 ,  H01L29/76 ,  H01L29/786 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20 ,  H01L51/52

CPC分类号： H01L29/78603 ,  H01L27/12 ,  H01L27/1248 ,  H01L27/3262 ,  H01L51/5284

摘要： A TFT having a dual buffer structure, a method of fabricating the same, and a flat panel display having the TFT, and a method of fabricating the same are provided. The TFT includes a first buffer layer formed of an amorphous silicon layer on a substrate, a second buffer layer formed on the first buffer layer. The TFT also includes a semiconductor layer formed on the second buffer layer and a gate electrode formed on the semiconductor layer. The dual buffer structure provides better barrier to impurities diffusing from the substrate, and also acts as a black matrix to reduce unwanted reflections and is a source of hydrogen to passivate other layers.

摘要翻译： 提供具有双缓冲结构的TFT及其制造方法，以及具有该TFT的平板显示器及其制造方法。 TFT包括由衬底上的非晶硅层形成的第一缓冲层，形成在第一缓冲层上的第二缓冲层。 TFT还包括形成在第二缓冲层上的半导体层和形成在半导体层上的栅电极。 双缓冲结构为从衬底扩散的杂质提供更好的屏障，并且还用作黑色矩阵以减少不必要的反射，并且是氢源来钝化其它层。

公开(公告)号：US06878584B2

公开(公告)日：2005-04-12

申请号：US10857983

申请日：2004-06-02

申请人： Seong-Moh Seo ,  Jae-Bon Koo

发明人： Seong-Moh Seo ,  Jae-Bon Koo

IPC分类号： H05B33/10 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L27/13 ,  H01L27/32 ,  H01L21/8242

CPC分类号： H01L29/66757 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/1288 ,  H01L27/3244 ,  H01L27/3265

摘要： A flat panel display device having a high capacitance and a high aperture ratio. A thin film transistor and a capacitor are formed on an insulating substrate. The thin film transistor includes a semiconductor layer, a gate electrode and source and drain electrodes. The capacitor has first and second capacitor electrodes and a dielectric layer. An insulating layer is formed over the transistor to insulate the gate electrode from the source and drain electrodes, and a portion of the insulating layer is formed as the dielectric layer between the first and second capacitor electrodes. A non-planar shape of the first capacitor electrode and a conforming shape of the dielectric layer and a second capacitor electrode increase a capacitance of the capacitor. The portion of the insulating layer serving as the capacitor dielectric is formed to be thinner than the portion of the insulating layer formed over the gate electrode.

摘要翻译： 具有高电容和高开口率的平板显示装置。 在绝缘基板上形成薄膜晶体管和电容器。 薄膜晶体管包括半导体层，栅极电极和源极和漏极。 电容器具有第一和第二电容器电极和电介质层。 在晶体管上形成绝缘层以使栅电极与源电极和漏电极绝缘，并且绝缘层的一部分形成为第一和第二电容器电极之间的电介质层。 第一电容器电极的非平面形状和电介质层和第二电容器电极的适形形状增加了电容器的电容。 用作电容器电介质的绝缘层的部分形成为比形成在栅电极上的绝缘层的部分更薄。

公开(公告)号：US07554118B2

公开(公告)日：2009-06-30

申请号：US11124124

申请日：2005-05-09

申请人： Chang-Soo Kim ,  Tae-Wook Kang ,  Chang-Yong Jeong ,  Jae-Young Oh ,  Sang-Il Park ,  Seong-Moh Seo

发明人： Chang-Soo Kim ,  Tae-Wook Kang ,  Chang-Yong Jeong ,  Jae-Young Oh ,  Sang-Il Park ,  Seong-Moh Seo

IPC分类号： H01L29/04 ,  H01L21/00

CPC分类号： H01L29/78603 ,  H01L27/12 ,  H01L27/1248 ,  H01L27/3262 ,  H01L51/5284

摘要： A TFT having a dual buffer structure, a method of fabricating the same, and a flat panel display having the TFT, and a method of fabricating the same are provided. The TFT includes a first buffer layer formed of an amorphous silicon layer on a substrate, a second buffer layer formed on the first buffer layer. The TFT also includes a semiconductor layer formed on the second buffer layer and a gate electrode formed on the semiconductor layer. The dual buffer structure provides better barrier to impurities diffusing from the substrate, and also acts as a black matrix to reduce unwanted reflections and is a source of hydrogen to passivate other layers.

摘要翻译： 提供具有双缓冲结构的TFT及其制造方法，以及具有该TFT的平板显示器及其制造方法。 TFT包括由衬底上的非晶硅层形成的第一缓冲层，形成在第一缓冲层上的第二缓冲层。 TFT还包括形成在第二缓冲层上的半导体层和形成在半导体层上的栅电极。 双缓冲结构为从衬底扩散的杂质提供更好的屏障，并且还用作黑色矩阵以减少不必要的反射，并且是氢源来钝化其它层。

公开(公告)号：US20050253171A1

公开(公告)日：2005-11-17

申请号：US11123012

申请日：2005-05-06

申请人： Tae-Wook Kang ,  Seong-Moh Seo ,  Chang-Su Seo ,  Yu-Sung Cho ,  Hyun-Eok Shin ,  Kwan-Hee Lee

发明人： Tae-Wook Kang ,  Seong-Moh Seo ,  Chang-Su Seo ,  Yu-Sung Cho ,  Hyun-Eok Shin ,  Kwan-Hee Lee

IPC分类号： H05B33/10 ,  H01L27/10 ,  H01L27/32 ,  H01L51/52

CPC分类号： H01L51/5271 ,  H01L27/3246 ,  H01L27/3248 ,  H01L27/3258 ,  H01L2251/5315

摘要： An organic light emitting display (OLED) and method of fabricating the same are provided having a reduced number of photolithography and etching steps. The method includes a source electrode and a drain electrode being formed over a substrate, and at least one insulating layer being formed over the source electrode and drain electrode. After the insulation layer is formed, a reflecting layer pattern is formed. A via contact hole is formed through the insulating layer using the reflecting layer pattern as an etching mask. Multiple insulating layers may be formed and have a via contact hole etched therethrough in one etching step using the reflecting layer pattern as a mask. Alternatively, each insulating layer may have a via contact hole separately etched therethrough, with the last layer being etched using the reflective layer pattern as a mask. Consequently, the number of photolithography and etching steps is reduced thereby leading to higher manufacturing yield and lower manufacturing cost.

摘要翻译： 提供有机发光显示器（OLED）及其制造方法，其具有减少数量的光刻和蚀刻步骤。 该方法包括在基板上形成的源电极和漏电极，以及在源电极和漏电极之上形成的至少一个绝缘层。 在形成绝缘层之后，形成反射层图案。 使用反射层图案作为蚀刻掩模，通过绝缘层形成通孔接触孔。 可以在使用反射层图案作为掩模的一个蚀刻步骤中形成多个绝缘层并且具有通过其蚀刻的通孔接触孔。 或者，每个绝缘层可以具有分别蚀刻穿过其中的通孔接触孔，其中使用反射层图案作为掩模蚀刻最后一层。 因此，光刻和蚀刻步骤的数量减少，从而导致更高的制造成品率和更低的制造成本。