Method for evaluating signal transmission quality
    11.
    发明授权
    Method for evaluating signal transmission quality 有权
    信号传输质量评估方法

    公开(公告)号:US07933360B2

    公开(公告)日:2011-04-26

    申请号:US11162571

    申请日:2005-09-15

    IPC分类号: H03K9/00 H04L27/00

    CPC分类号: H04N17/004

    摘要: A method to assess signal transmission quality and the adjust method thereof are proposed. First, different time points of a control signal at a receiving end are acquired and the number of signal transitions in a predetermined time interval is counted. Next, the number of signal transitions is recorded and compared to a reference value to obtain a comparison result. The quality of the control signal is then determined based on the comparison result. The parameter setting of the receiving end is adjusted according to the quality of the control signal received by the receiving end to get a better performance setting.

    摘要翻译: 提出了一种评估信号传输质量的方法及其调整方法。 首先,获取接收端的控制信号的不同时间点,并对预定时间间隔内的信号转换次数进行计数。 接下来,记录信号转换的数量并将其与参考值进行比较以获得比较结果。 然后根据比较结果确定控制信号的质量。 根据接收端接收到的控制信号的质量调整接收端的参数设置,以获得更好的性能设置。

    Frame synchronization method and device utilizing frame buffer
    12.
    发明授权
    Frame synchronization method and device utilizing frame buffer 有权
    帧同步方法和利用帧缓冲器的设备

    公开(公告)号:US07830450B2

    公开(公告)日:2010-11-09

    申请号:US11531281

    申请日:2006-09-13

    IPC分类号: H04N7/01

    摘要: A frame synchronization method includes: temporarily storing input data of at least one source frame in a frame buffer according to an input time sequence; generating an output time sequence according to the input time sequence and a delay time; generating output data of a destination frame according to the input data of the source frame; and outputting the output data of the destination frame according to an output time sequence; wherein an average frame rate of the source frame is substantially the same as that of the destination frame.

    摘要翻译: 帧同步方法包括:根据输入的时间序列临时存储帧缓冲器中的至少一个源帧的输入数据; 根据输入时间序列和延迟时间生成输出时间序列; 根据源帧的输入数据生成目的地帧的输出数据; 并根据输出时间序列输出目的地帧的输出数据; 其中所述源帧的平均帧速率与所述目的地帧的平均帧速率基本相同。

    APPARATUS AND METHOD FOR EVALUATING DATA TRANSMISSION
    13.
    发明申请
    APPARATUS AND METHOD FOR EVALUATING DATA TRANSMISSION 审中-公开
    用于评估数据传输的装置和方法

    公开(公告)号:US20060098745A1

    公开(公告)日:2006-05-11

    申请号:US11164065

    申请日:2005-11-09

    IPC分类号: H04L27/00

    CPC分类号: H04L1/20

    摘要: The present invention discloses an apparatus for evaluating a transmission quality of data display system and its related method. The method comprises: mixing at least one pattern in a first signal of an image signal to produce a mixed signal in the transmitter, wherein said pattern is known to said receiver; transferring the mixed signal to the receiver through a channel; separating the received mixed signal into a received signal and a received pattern in the receiver; and evaluating the transmission quality of the display system according to the pattern and the received pattern.

    摘要翻译: 本发明公开了一种用于评估数据显示系统的传输质量的装置及其相关方法。 该方法包括:将图像信号的第一信号中的至少一个图案混合以在发送器中产生混合信号,其中所述图案对于所述接收机是已知的; 通过信道将混合信号传送到接收机; 将接收到的混合信号分离成接收信号和接收机中的接收模式; 以及根据图案和接收到的图案来评估显示系统的传输质量。

    METHOD FOR EVALUATING SIGNAL TRANSMISSION QUALITY
    14.
    发明申请
    METHOD FOR EVALUATING SIGNAL TRANSMISSION QUALITY 有权
    评估信号传输质量的方法

    公开(公告)号:US20060074682A1

    公开(公告)日:2006-04-06

    申请号:US11162571

    申请日:2005-09-15

    IPC分类号: G10L21/00

    CPC分类号: H04N17/004

    摘要: A method to assess signal transmission quality and the adjust method thereof are proposed. First, different time points of a control signal at a receiving end are acquired and the number of signal transition in a predetermined time interval is counted. Next, the number of signal transition is recorded and compared to obtain a comparison result. The quality of control signal is then determined based on the comparison result. Besides, the parameter setting of the receiving end is adjusted according to the quality of the control signal received by the receiving end to get a better performance setting.

    摘要翻译: 提出了一种评估信号传输质量的方法及其调整方法。 首先,获取接收端的控制信号的不同时间点,并且对预定时间间隔内的信号转换次数进行计数。 接下来,记录和比较信号转换的数量以获得比较结果。 然后根据比较结果确定控制信号的质量。 此外,接收端的参数设置根据接收端接收的控制信号的质量进行调整,以获得更好的性能设置。

    Mode detecting circuit and method thereof
    15.
    发明授权
    Mode detecting circuit and method thereof 有权
    模式检测电路及其方法

    公开(公告)号:US09082332B2

    公开(公告)日:2015-07-14

    申请号:US12128372

    申请日:2008-05-28

    IPC分类号: G09G5/02 G09G5/00

    摘要: The invention discloses a mode detection circuit and a method thereof, for detecting an image signal, the image signal includes a horizontal resolution and the vertical resolution. The mode detection circuit includes a measuring unit, a calculation unit, and a decision unit. The measuring unit receives a clock signal and is used to count the clock signal to output a first counting value and the second counting value. The calculation unit is used to perform the calculation with the first counting value and the second counting value and thereby outputting a calculating value, wherein the calculating value outputted by the calculation unit is corresponding to the ratio of the first counting value to the second counting value. The decision unit is used to determine the horizontal resolution or the vertical resolution according to the calculating value.

    摘要翻译: 本发明公开了一种模式检测电路及其方法,用于检测图像信号,图像信号包括水平分辨率和垂直分辨率。 模式检测电路包括测量单元,计算单元和判定单元。 测量单元接收时钟信号,并用于对时钟信号进行计数以输出第一计数值和第二计数值。 计算单元用于执行具有第一计数值和第二计数值的计算,从而输出计算值,其中由计算单元输出的计算值对应于第一计数值与第二计数值的比率 。 决策单元用于根据计算值确定水平分辨率或垂直分辨率。

    Display processing device and timing controller thereof

    公开(公告)号:US08514206B2

    公开(公告)日:2013-08-20

    申请号:US12314601

    申请日:2008-12-12

    IPC分类号: G09G5/00

    摘要: A timing controller for a display processing device includes: a plurality of predetermined pins for receiving an image signal by a pin-share method, wherein the image signal is a first format image signal or a second format image signal; a detector coupled to the predetermined pins and for detecting at least one of the predetermined pins to determine whether the image signal is the first format image signal or the second format image signal and outputting a detection result; and a processor coupled to the detector and for processing the image signal according to the detection result to generate and output a timing control signal.

    Synchronization Determining Circuit, Receiver Including the Synchronization Determining Circuit, and Method of the Receiver
    17.
    发明申请
    Synchronization Determining Circuit, Receiver Including the Synchronization Determining Circuit, and Method of the Receiver 有权
    同步确定电路,包括同步确定电路的接收器和接收器的方法

    公开(公告)号:US20100014621A1

    公开(公告)日:2010-01-21

    申请号:US12501959

    申请日:2009-07-13

    IPC分类号: H04L7/00

    摘要: A receiver includes; a recovery circuit for receiving an input signal, and generating a data signal and a recovery clock; a processing circuit for processing the data signal to generate a processed signal; and a synchronization determining circuit for determining a synchronization state of the recovery clock according to the processed signal and a first reference value. The data signal includes a synchronous pattern, and the first reference value corresponds to at least a portion of a value in the synchronous pattern processed by the processing circuit. A method of the receiver is also disclosed.

    摘要翻译: 接收机包括 恢复电路,用于接收输入信号,并产生数据信号和恢复时钟; 处理电路,用于处理数据信号以产生处理的信号; 以及同步确定电路,用于根据处理的信号和第一参考值确定恢复时钟的同步状态。 数据信号包括同步模式,第一参考值对应于由处理电路处理的同步模式中的值的至少一部分。 还公开了接收机的方法。

    SIGNAL RECEIVING CIRCUIT ADAPTED FOR MULTIPLE DIGITAL VIDEO/AUDIO TRANSMISSION INTERFACE STANDARDS
    18.
    发明申请
    SIGNAL RECEIVING CIRCUIT ADAPTED FOR MULTIPLE DIGITAL VIDEO/AUDIO TRANSMISSION INTERFACE STANDARDS 有权
    适用于多个数字视频/音频传输接口标准的信号接收电路

    公开(公告)号:US20090015722A1

    公开(公告)日:2009-01-15

    申请号:US12128634

    申请日:2008-05-29

    IPC分类号: H04N5/44

    摘要: The invention provides a signal receiving circuit applied to multiple digital video/audio transmission interface standards. The signal receiving circuit includes at least an input interface for receiving an input signal, and at least an interface circuit. The input interface includes a set of shared input terminals, a set of first separate input terminals for receiving an input signal corresponding to a first transmission specification with the set of shared input terminals, and a set of second separate input terminals for receiving an input signal corresponding to a second transmission specification with the set of shared input terminals. The interface circuit includes a control circuit coupled to the input interface for supplying a control signal, and a processing module coupled to the input interface and the control circuit for processing the input signal according to the control signal to generate an output signal.

    摘要翻译: 本发明提供一种应用于多个数字视频/音频传输接口标准的信号接收电路。 信号接收电路至少包括用于接收输入信号的输入接口和至少一个接口电路。 输入接口包括一组共享输入端子,一组第一分离输入端子,用于接收与该组共享输入端子对应的第一传输规格的输入信号,以及一组用于接收输入信号的第二单独输入端子 对应于具有该组共享输入端的第二传输规范。 接口电路包括耦合到用于提供控制信号的输入接口的控制电路,以及耦合到输入接口和控制电路的处理模块,用于根据控制信号处理输入信号以产生输出信号。

    Phase locked loop with nonlinear phase-error response characteristic
    19.
    发明授权
    Phase locked loop with nonlinear phase-error response characteristic 有权
    具有非线性相位误差响应特性的锁相环

    公开(公告)号:US07218177B2

    公开(公告)日:2007-05-15

    申请号:US11160767

    申请日:2005-07-07

    IPC分类号: H03L7/00

    CPC分类号: H03L7/0891 H03L7/093

    摘要: A phase-locked loop includes a phase/frequency detector for generating phase error signal according to a reference signal and an input signal, a charge pump for outputting a voltage signal according to the phase error signal, a voltage-controlled oscillator for outputting an output signal corresponding to the phase error signal according to the voltage signal, an adaptive adjusting unit for outputting a control signal according to the phase error signal, so as to form a nonlinear between the output signal and the phase error signal.

    摘要翻译: 锁相环包括用于根据参考信号和输入信号产生相位误差信号的相位/频率检测器,用于根据相位误差信号输出电压信号的电荷泵,用于输出输出的电压控制振荡器 根据电压信号对应于相位误差信号的信号,自适应调整单元,用于根据相位误差信号输出控制信号,以便在输出信号和相位误差信号之间形成非线性。

    Phase frequency detector used in phase locked loop
    20.
    发明授权
    Phase frequency detector used in phase locked loop 有权
    相位频率检测器用于锁相环

    公开(公告)号:US07102448B2

    公开(公告)日:2006-09-05

    申请号:US10812875

    申请日:2004-03-31

    IPC分类号: H03D13/00

    CPC分类号: H03L7/089

    摘要: A phase frequency detector used in a phase locked loop includes a phase error detecting unit for outputting phase error signals according to a phase error between a first input signal and a second input signal, and a reset unit coupled to the phase error detecting unit. The reset unit outputs reset signals according to the first and second input signals so as to reset the phase error detecting unit without delay time. Thus, it is possible to make the output timing of the phase error signal in a more precisely linear proportion to the phase error value and to enhance the sensitivity of the phase locked loop.

    摘要翻译: 在锁相环中使用的相位频率检测器包括相位误差检测单元,用于根据第一输入信号和第二输入信号之间的相位误差输出相位误差信号,以及耦合到相位误差检测单元的复位单元。 复位单元根据第一和第二输入信号输出复位信号,以便无延迟时间复位相位误差检测单元。 因此,可以使相位误差信号的输出定时与相位误差值更精确地成线性比例,并提高锁相环的灵敏度。