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21 条记录 (耗时 0.043 秒)

    METHOD FOR FABRICATING FIELD EFFECT TRANSISTOR
    11.
    发明申请
    METHOD FOR FABRICATING FIELD EFFECT TRANSISTOR 有权
    用于制作场效应晶体管的方法

    公开(公告)号：US20110143505A1

    公开(公告)日：2011-06-16

    申请号：US12773216

    申请日：2010-05-04

    申请人： Hokyun AHN ,  Jong-Won Lim ,  Hyung Sup Yoon ,  Woojin Chang ,  Hae Cheon Kim ,  Eun Soo Nam

    发明人： Hokyun AHN ,  Jong-Won Lim ,  Hyung Sup Yoon ,  Woojin Chang ,  Hae Cheon Kim ,  Eun Soo Nam

    IPC分类号： H01L21/337

    CPC分类号： H01L29/66462

    摘要： Provided is a method for fabricating a field effect transistor. In the method, an active layer and a capping layer are formed on a substrate. A source electrode and a drain electrode is formed on the capping layer. A dielectric interlayer is formed on the substrate, and resist layers having first and second openings with asymmetrical depths are formed on the dielectric interlayer between the source electrode and the drain electrode. The first opening exposes the dielectric interlayer, and the second opening exposes the lowermost of the resist layers. The dielectric interlayer in the bottom of the first opening and the lowermost resist layer under the second opening are simultaneously removed to expose the capping layer to the first opening and expose the dielectric interlayer to the second opening. The capping layer of the first opening is removed to expose the active layer. A metal layer is deposited on the substrate to simultaneously form a gate electrode and a field plate in the first opening and the second opening. The resist layers are removed to lift off the metal layer on the resist layers.

    摘要翻译： 提供了一种用于制造场效应晶体管的方法。 在该方法中，在基板上形成有源层和覆盖层。 源极电极和漏电极形成在覆盖层上。 在基板上形成电介质中间层，在源电极和漏极之间的电介质层间形成有具有不对称深度的第一和第二开口的抗蚀剂层。 第一开口露出电介质中间层，第二开口露出最低层的抗蚀剂层。 同时除去第一开口底部的电介质中间层和第二开口下面的最下面的抗蚀剂层，以将覆盖层暴露于第一开口，并将电介质中间层暴露于第二开口。 去除第一开口的覆盖层以暴露活性层。 金属层沉积在基板上，以在第一开口和第二开口中同时形成栅电极和场板。 去除抗蚀剂层以剥离抗蚀剂层上的金属层。

    Method for fabricating field effect transistor using a compound semiconductor
    12.
    发明授权
    Method for fabricating field effect transistor using a compound semiconductor 有权
    使用化合物半导体制造场效应晶体管的方法

    公开(公告)号：US08053345B2

    公开(公告)日：2011-11-08

    申请号：US12773216

    申请日：2010-05-04

    申请人： Hokyun Ahn ,  Jong-Won Lim ,  Hyung Sup Yoon ,  Woojin Chang ,  Hae Cheon Kim ,  Eun Soo Nam

    发明人： Hokyun Ahn ,  Jong-Won Lim ,  Hyung Sup Yoon ,  Woojin Chang ,  Hae Cheon Kim ,  Eun Soo Nam

    IPC分类号： H01L21/3205 ,  H01L21/44

    CPC分类号： H01L29/66462

    摘要： Provided is a method for fabricating a field effect transistor. In the method, an active layer and a capping layer are formed on a substrate. A source electrode and a drain electrode is formed on the capping layer. A dielectric interlayer is formed on the substrate, and resist layers having first and second openings with asymmetrical depths are formed on the dielectric interlayer between the source electrode and the drain electrode. The first opening exposes the dielectric interlayer, and the second opening exposes the lowermost of the resist layers. The dielectric interlayer in the bottom of the first opening and the lowermost resist layer under the second opening are simultaneously removed to expose the capping layer to the first opening and expose the dielectric interlayer to the second opening. The capping layer of the first opening is removed to expose the active layer. A metal layer is deposited on the substrate to simultaneously form a gate electrode and a field plate in the first opening and the second opening. The resist layers are removed to lift off the metal layer on the resist layers.

    摘要翻译： 提供了一种用于制造场效应晶体管的方法。 在该方法中，在基板上形成有源层和覆盖层。 源极电极和漏电极形成在覆盖层上。 在基板上形成电介质中间层，在源电极和漏极之间的电介质层间形成有具有不对称深度的第一和第二开口的抗蚀剂层。 第一开口露出电介质中间层，第二开口露出最低层的抗蚀剂层。 同时除去第一开口底部的电介质中间层和第二开口下面的最下面的抗蚀剂层，以将覆盖层暴露于第一开口，并将电介质中间层暴露于第二开口。 去除第一开口的覆盖层以暴露活性层。 金属层沉积在基板上，以在第一开口和第二开口中同时形成栅电极和场板。 去除抗蚀剂层以剥离抗蚀剂层上的金属层。

    MONOLITHIC MICROWAVE INTEGRATED CIRCUIT DEVICE AND METHOD OF FORMING THE SAME
    13.
    发明申请
    MONOLITHIC MICROWAVE INTEGRATED CIRCUIT DEVICE AND METHOD OF FORMING THE SAME 失效
    单片微波集成电路装置及其形成方法

    公开(公告)号：US20110140175A1

    公开(公告)日：2011-06-16

    申请号：US12832432

    申请日：2010-07-08

    申请人： Byoung-Gue MIN ,  Jongmin Lee ,  Seong-ll Kim ,  Hyung Sup Yoon

    发明人： Byoung-Gue MIN ,  Jongmin Lee ,  Seong-ll Kim ,  Hyung Sup Yoon

    IPC分类号： H01L27/06 ,  H01L21/8222

    CPC分类号： H01L29/66318 ,  H01L21/8252 ,  H01L27/0605 ,  H01L29/66204 ,  H01L29/7371 ,  H01L29/868

    摘要： Provided are a monolithic microwave integrated circuit device and a method for forming the same. The method includes: forming an sub-collector layer, a collector layer, a base layer, an emitter layer, and an emitter cap layer on a Heterojunction Bipolar Transistor (HBT) region and a PIN diode region of a substrate; forming an emitter pattern and an emitter cap pattern in the HBT region and exposing the base layer by patterning the emitter layer and the emitter cap layer; and forming an intrinsic region by doping a portion of the collector layer of the PIN diode region with a first type impurity, the PIN diode region being spaced apart from the HBT region.

    摘要翻译： 提供了一种单片微波集成电路器件及其形成方法。 该方法包括：在基底的异质结双极晶体管（HBT）区域和PIN二极管区域上形成子集电极层，集电极层，基极层，发射极层和发射极盖层; 在HBT区域中形成发射极图案和发射极盖图案，并通过图案化发射极层和发射极盖层而使基底层曝光; 并且通过用第一类型杂质掺杂PIN二极管区域的集电极层的一部分来形成本征区域，PIN二极管区域与HBT区域间隔开。

    Method of fabricating T-gate
    17.
    发明申请
    Method of fabricating T-gate 有权
    制造T型门的方法

    公开(公告)号：US20070128752A1

    公开(公告)日：2007-06-07

    申请号：US11607417

    申请日：2006-12-01

    申请人： Jae Yoeb Shim ,  Hyung Sup Yoon ,  Dong Min Kang ,  Ju Yeon Hong ,  Kyung Ho Lee

    发明人： Jae Yoeb Shim ,  Hyung Sup Yoon ,  Dong Min Kang ,  Ju Yeon Hong ,  Kyung Ho Lee

    IPC分类号： H01L21/00

    CPC分类号： H01L21/0331 ,  H01L21/28587

    摘要： A method of fabricating a T-gate is provided. The method includes the steps of: forming a photoresist layer on a substrate; patterning the photoresist layer formed on the substrate and forming a first opening; forming a first insulating layer on the photoresist layer and the substrate; removing the first insulating layer and forming a second opening to expose the substrate; forming a second insulating layer on the first insulating layer; removing the second insulating layer and forming a third opening to expose the substrate; forming a metal layer on the second insulating layer on which the photoresist layer and the third opening are formed; and removing the metal layer formed on the photoresist layer. Accordingly, a uniform and elaborate opening defining the length of a gate may be formed by deposition of the insulating layer and a blanket dry etching process, and thus a more elaborate micro T-gate electrode may be fabricated.

    摘要翻译： 提供一种制造T型栅极的方法。 该方法包括以下步骤：在衬底上形成光致抗蚀剂层; 图案化形成在基板上的光致抗蚀剂层并形成第一开口; 在所述光致抗蚀剂层和所述基板上形成第一绝缘层; 去除所述第一绝缘层并形成第二开口以暴露所述衬底; 在所述第一绝缘层上形成第二绝缘层; 去除所述第二绝缘层并形成第三开口以暴露所述衬底; 在其上形成有光致抗蚀剂层和第三开口的第二绝缘层上形成金属层; 并除去形成在光致抗蚀剂层上的金属层。 因此，可以通过沉积绝缘层和橡皮干蚀刻工艺来形成限定栅极长度的均匀且精细的开口，因此可以制造更精细的微型T型栅电极。

    Method of fabricating T-gate
    18.
    发明授权
    Method of fabricating T-gate 有权
    制造T型门的方法

    公开(公告)号：US07468295B2

    公开(公告)日：2008-12-23

    申请号：US11607417

    申请日：2006-12-01

    申请人： Jae Yoeb Shim ,  Hyung Sup Yoon ,  Dong Min Kang ,  Ju Yeon Hong ,  Kyung Ho Lee

    发明人： Jae Yoeb Shim ,  Hyung Sup Yoon ,  Dong Min Kang ,  Ju Yeon Hong ,  Kyung Ho Lee

    IPC分类号： H01L21/338

    CPC分类号： H01L21/0331 ,  H01L21/28587

    摘要： A method of fabricating a T-gate is provided. The method includes the steps of: forming a photoresist layer on a substrate; patterning the photoresist layer formed on the substrate and forming a first opening; forming a first insulating layer on the photoresist layer and the substrate; removing the first insulating layer and forming a second opening to expose the substrate; forming a second insulating layer on the first insulating layer; removing the second insulating layer and forming a third opening to expose the substrate; forming a metal layer on the second insulating layer on which the photoresist layer and the third opening are formed; and removing the metal layer formed on the photoresist layer. Accordingly, a uniform and elaborate opening defining the length of a gate may be formed by deposition of the insulating layer and a blanket dry etching process, and thus a more elaborate micro T-gate electrode may be fabricated.

    摘要翻译： 提供一种制造T型栅极的方法。 该方法包括以下步骤：在衬底上形成光致抗蚀剂层; 图案化形成在基板上的光致抗蚀剂层并形成第一开口; 在所述光致抗蚀剂层和所述基板上形成第一绝缘层; 去除所述第一绝缘层并形成第二开口以暴露所述衬底; 在所述第一绝缘层上形成第二绝缘层; 去除所述第二绝缘层并形成第三开口以暴露所述衬底; 在其上形成有光致抗蚀剂层和第三开口的第二绝缘层上形成金属层; 并除去形成在光致抗蚀剂层上的金属层。 因此，可以通过沉积绝缘层和橡皮干蚀刻工艺来形成限定栅极长度的均匀且精细的开口，因此可以制造更精细的微型T型栅电极。

    Method of fabricating T-gate
    19.
    发明授权
    Method of fabricating T-gate 失效
    制造T型门的方法

    公开(公告)号：US07915106B2

    公开(公告)日：2011-03-29

    申请号：US12270016

    申请日：2008-11-13

    申请人： Jae Yeob Shim ,  Hyung Sup Yoon ,  Dong Min Kang ,  Ju Yeon Hong ,  Kyung Ho Lee

    发明人： Jae Yeob Shim ,  Hyung Sup Yoon ,  Dong Min Kang ,  Ju Yeon Hong ,  Kyung Ho Lee

    IPC分类号： H01L21/338 ,  H01L21/44 ,  H01L21/28

    CPC分类号： H01L21/0331 ,  H01L21/28587

    摘要： A method of fabricating a T-gate is provided. The method includes the steps of: forming a photoresist layer on a substrate; patterning the photoresist layer formed on the substrate and forming a first opening; forming a first insulating layer on the photoresist layer and the substrate; removing the first insulating layer and forming a second opening to expose the substrate; forming a second insulating layer on the first insulating layer; removing the second insulating layer and forming a third opening to expose the substrate; forming a metal layer on the second insulating layer on which the photoresist layer and the third opening are formed; and removing the metal layer formed on the photoresist layer. Accordingly, a uniform and elaborate opening defining the length of a gate may be formed by deposition of the insulating layer and a blanket dry etching process, and thus a more elaborate micro T-gate electrode may be fabricated.

    摘要翻译： 提供一种制造T型栅极的方法。 该方法包括以下步骤：在衬底上形成光致抗蚀剂层; 图案化形成在基板上的光致抗蚀剂层并形成第一开口; 在所述光致抗蚀剂层和所述基板上形成第一绝缘层; 去除所述第一绝缘层并形成第二开口以暴露所述衬底; 在所述第一绝缘层上形成第二绝缘层; 去除所述第二绝缘层并形成第三开口以暴露所述衬底; 在其上形成有光致抗蚀剂层和第三开口的第二绝缘层上形成金属层; 并除去形成在光致抗蚀剂层上的金属层。 因此，可以通过沉积绝缘层和橡皮干蚀刻工艺来形成限定栅极长度的均匀且精细的开口，因此可以制造更精细的微型T型栅电极。

    Microwave power amplifier
    20.
    发明授权
    Microwave power amplifier 有权
    微波功率放大器

    公开(公告)号：US06940354B2

    公开(公告)日：2005-09-06

    申请号：US10735037

    申请日：2003-12-11

    申请人： Dong Min Kang ,  Hyung Sup Yoon ,  Hea Cheon Kim ,  Kyoung Ik Cho

    发明人： Dong Min Kang ,  Hyung Sup Yoon ,  Hea Cheon Kim ,  Kyoung Ik Cho

    IPC分类号： H03F3/189 ,  H03F3/60 ,  H03F3/68 ,  H03F3/191

    CPC分类号： H03F3/605

    摘要： A microwave power amplifier comprising a drive amplifying stage includes power elements, gate and drain bias circuits of the power elements, a RC parallel circuit connected between input port and gates of said power elements, a shunt resistor connected between ground terminal and said gates of power elements, and a negative feedback circuit connected in series with resistors and capacitors and in parallel with the power elements. An interstage matching circuit is connected in series with the drive amplifying stage; and a power amplifying stage including power elements connected in parallel with a power divider and a power coupler, gate and drain bias circuits of said power elements, a RC parallel circuit connected between the gates of power elements and the interstage matching circuit, and a shunt resistor connected between a ground and the gates of power elements.

    摘要翻译： 包括驱动放大级的微波功率放大器包括功率元件，功率元件的栅极和漏极偏置电路，连接在所述功率元件的输入端口和栅极之间的RC并联电路，连接在接地端子和所述功率门之间的分流电阻器 元件和与电阻器和电容器串联连接并与功率元件并联的负反馈电路。 级间匹配电路与驱动放大级串联; 以及功率放大级，包括与功率分配器和功率耦合器并联连接的功率元件，所述功率元件的栅极和漏极偏置电路，连接在功率元件的栅极和级间匹配电路之间的RC并联电路，以及分流器 电阻连接在地和功率元件的门之间。