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    Method of fabricating T-gate
    1.
    发明授权
    Method of fabricating T-gate 有权
    制造T型门的方法

    公开(公告)号：US07468295B2

    公开(公告)日：2008-12-23

    申请号：US11607417

    申请日：2006-12-01

    申请人： Jae Yoeb Shim ,  Hyung Sup Yoon ,  Dong Min Kang ,  Ju Yeon Hong ,  Kyung Ho Lee

    发明人： Jae Yoeb Shim ,  Hyung Sup Yoon ,  Dong Min Kang ,  Ju Yeon Hong ,  Kyung Ho Lee

    IPC分类号： H01L21/338

    CPC分类号： H01L21/0331 ,  H01L21/28587

    摘要： A method of fabricating a T-gate is provided. The method includes the steps of: forming a photoresist layer on a substrate; patterning the photoresist layer formed on the substrate and forming a first opening; forming a first insulating layer on the photoresist layer and the substrate; removing the first insulating layer and forming a second opening to expose the substrate; forming a second insulating layer on the first insulating layer; removing the second insulating layer and forming a third opening to expose the substrate; forming a metal layer on the second insulating layer on which the photoresist layer and the third opening are formed; and removing the metal layer formed on the photoresist layer. Accordingly, a uniform and elaborate opening defining the length of a gate may be formed by deposition of the insulating layer and a blanket dry etching process, and thus a more elaborate micro T-gate electrode may be fabricated.

    摘要翻译： 提供一种制造T型栅极的方法。 该方法包括以下步骤：在衬底上形成光致抗蚀剂层; 图案化形成在基板上的光致抗蚀剂层并形成第一开口; 在所述光致抗蚀剂层和所述基板上形成第一绝缘层; 去除所述第一绝缘层并形成第二开口以暴露所述衬底; 在所述第一绝缘层上形成第二绝缘层; 去除所述第二绝缘层并形成第三开口以暴露所述衬底; 在其上形成有光致抗蚀剂层和第三开口的第二绝缘层上形成金属层; 并除去形成在光致抗蚀剂层上的金属层。 因此，可以通过沉积绝缘层和橡皮干蚀刻工艺来形成限定栅极长度的均匀且精细的开口，因此可以制造更精细的微型T型栅电极。

    Method of fabricating T-gate
    2.
    发明申请
    Method of fabricating T-gate 有权
    制造T型门的方法

    公开(公告)号：US20070128752A1

    公开(公告)日：2007-06-07

    申请号：US11607417

    申请日：2006-12-01

    申请人： Jae Yoeb Shim ,  Hyung Sup Yoon ,  Dong Min Kang ,  Ju Yeon Hong ,  Kyung Ho Lee

    发明人： Jae Yoeb Shim ,  Hyung Sup Yoon ,  Dong Min Kang ,  Ju Yeon Hong ,  Kyung Ho Lee

    IPC分类号： H01L21/00

    CPC分类号： H01L21/0331 ,  H01L21/28587

    摘要： A method of fabricating a T-gate is provided. The method includes the steps of: forming a photoresist layer on a substrate; patterning the photoresist layer formed on the substrate and forming a first opening; forming a first insulating layer on the photoresist layer and the substrate; removing the first insulating layer and forming a second opening to expose the substrate; forming a second insulating layer on the first insulating layer; removing the second insulating layer and forming a third opening to expose the substrate; forming a metal layer on the second insulating layer on which the photoresist layer and the third opening are formed; and removing the metal layer formed on the photoresist layer. Accordingly, a uniform and elaborate opening defining the length of a gate may be formed by deposition of the insulating layer and a blanket dry etching process, and thus a more elaborate micro T-gate electrode may be fabricated.

    摘要翻译： 提供一种制造T型栅极的方法。 该方法包括以下步骤：在衬底上形成光致抗蚀剂层; 图案化形成在基板上的光致抗蚀剂层并形成第一开口; 在所述光致抗蚀剂层和所述基板上形成第一绝缘层; 去除所述第一绝缘层并形成第二开口以暴露所述衬底; 在所述第一绝缘层上形成第二绝缘层; 去除所述第二绝缘层并形成第三开口以暴露所述衬底; 在其上形成有光致抗蚀剂层和第三开口的第二绝缘层上形成金属层; 并除去形成在光致抗蚀剂层上的金属层。 因此，可以通过沉积绝缘层和橡皮干蚀刻工艺来形成限定栅极长度的均匀且精细的开口，因此可以制造更精细的微型T型栅电极。

    Method of fabricating T-gate
    3.
    发明授权
    Method of fabricating T-gate 失效
    制造T型门的方法

    公开(公告)号：US07915106B2

    公开(公告)日：2011-03-29

    申请号：US12270016

    申请日：2008-11-13

    申请人： Jae Yeob Shim ,  Hyung Sup Yoon ,  Dong Min Kang ,  Ju Yeon Hong ,  Kyung Ho Lee

    发明人： Jae Yeob Shim ,  Hyung Sup Yoon ,  Dong Min Kang ,  Ju Yeon Hong ,  Kyung Ho Lee

    IPC分类号： H01L21/338 ,  H01L21/44 ,  H01L21/28

    CPC分类号： H01L21/0331 ,  H01L21/28587

    摘要： A method of fabricating a T-gate is provided. The method includes the steps of: forming a photoresist layer on a substrate; patterning the photoresist layer formed on the substrate and forming a first opening; forming a first insulating layer on the photoresist layer and the substrate; removing the first insulating layer and forming a second opening to expose the substrate; forming a second insulating layer on the first insulating layer; removing the second insulating layer and forming a third opening to expose the substrate; forming a metal layer on the second insulating layer on which the photoresist layer and the third opening are formed; and removing the metal layer formed on the photoresist layer. Accordingly, a uniform and elaborate opening defining the length of a gate may be formed by deposition of the insulating layer and a blanket dry etching process, and thus a more elaborate micro T-gate electrode may be fabricated.

    摘要翻译： 提供一种制造T型栅极的方法。 该方法包括以下步骤：在衬底上形成光致抗蚀剂层; 图案化形成在基板上的光致抗蚀剂层并形成第一开口; 在所述光致抗蚀剂层和所述基板上形成第一绝缘层; 去除所述第一绝缘层并形成第二开口以暴露所述衬底; 在所述第一绝缘层上形成第二绝缘层; 去除所述第二绝缘层并形成第三开口以暴露所述衬底; 在其上形成有光致抗蚀剂层和第三开口的第二绝缘层上形成金属层; 并除去形成在光致抗蚀剂层上的金属层。 因此，可以通过沉积绝缘层和橡皮干蚀刻工艺来形成限定栅极长度的均匀且精细的开口，因此可以制造更精细的微型T型栅电极。

    Microwave power amplifier
    6.
    发明授权
    Microwave power amplifier 有权
    微波功率放大器

    公开(公告)号：US06940354B2

    公开(公告)日：2005-09-06

    申请号：US10735037

    申请日：2003-12-11

    申请人： Dong Min Kang ,  Hyung Sup Yoon ,  Hea Cheon Kim ,  Kyoung Ik Cho

    发明人： Dong Min Kang ,  Hyung Sup Yoon ,  Hea Cheon Kim ,  Kyoung Ik Cho

    IPC分类号： H03F3/189 ,  H03F3/60 ,  H03F3/68 ,  H03F3/191

    CPC分类号： H03F3/605

    摘要： A microwave power amplifier comprising a drive amplifying stage includes power elements, gate and drain bias circuits of the power elements, a RC parallel circuit connected between input port and gates of said power elements, a shunt resistor connected between ground terminal and said gates of power elements, and a negative feedback circuit connected in series with resistors and capacitors and in parallel with the power elements. An interstage matching circuit is connected in series with the drive amplifying stage; and a power amplifying stage including power elements connected in parallel with a power divider and a power coupler, gate and drain bias circuits of said power elements, a RC parallel circuit connected between the gates of power elements and the interstage matching circuit, and a shunt resistor connected between a ground and the gates of power elements.

    摘要翻译： 包括驱动放大级的微波功率放大器包括功率元件，功率元件的栅极和漏极偏置电路，连接在所述功率元件的输入端口和栅极之间的RC并联电路，连接在接地端子和所述功率门之间的分流电阻器 元件和与电阻器和电容器串联连接并与功率元件并联的负反馈电路。 级间匹配电路与驱动放大级串联; 以及功率放大级，包括与功率分配器和功率耦合器并联连接的功率元件，所述功率元件的栅极和漏极偏置电路，连接在功率元件的栅极和级间匹配电路之间的RC并联电路，以及分流器 电阻连接在地和功率元件的门之间。

    Power amplifier having depletion mode high electron mobility transistor
    7.
    发明授权
    Power amplifier having depletion mode high electron mobility transistor 有权
    具有耗尽型高电子迁移率晶体管的功率放大器

    公开(公告)号：US08294521B2

    公开(公告)日：2012-10-23

    申请号：US12855055

    申请日：2010-08-12

    申请人： Dong Min Kang ,  Hong Gu Ji ,  Hokyun Ahn ,  Jong-Won Lim ,  Woojin Chang ,  Sang-Heung Lee ,  Dong-Young Kim ,  Hae Cheon Kim

    发明人： Dong Min Kang ,  Hong Gu Ji ,  Hokyun Ahn ,  Jong-Won Lim ,  Woojin Chang ,  Sang-Heung Lee ,  Dong-Young Kim ,  Hae Cheon Kim

    IPC分类号： H03F3/04

    CPC分类号： H03F3/24 ,  H03F1/565 ,  H03F3/195 ,  H03F2200/222

    摘要： Provided is a power amplifier including: a depletion mode high electron mobility transistor (D-mode HEMT) configured to amplify a signal inputted to a gate terminal and output the amplified signal through a drain terminal; an input matching circuit configured to serially ground the gate terminal; and a DC bias circuit connected between the drain terminal and a ground. Through the foregoing configuration, the HEMT may be biased only by a single DC bias circuit without any biasing means to provide a negative voltage. Also, superior matching characteristic may be provided in various operation frequency bands through a shunt inductor and a choke inductor.

    摘要翻译： 提供了一种功率放大器，包括：耗尽型高电子迁移率晶体管（D模式HEMT），被配置为放大输入到栅极端子的信号，并通过漏极端子输出放大的信号; 输入匹配电路，被配置为使所述栅极端子串联接地; 以及连接在漏极端子和地之间的DC偏置电路。 通过上述配置，HEMT可以仅由单个DC偏置电路偏压而没有任何偏置装置来提供负电压。 此外，可以通过并联电感器和扼流电感器在各种工作频带中提供优异的匹配特性。