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公开(公告)号：US11429172B2
公开(公告)日：2022-08-30
申请号：US16735563
申请日：2020-01-06
Applicant: Intel Corporation
Inventor： Alexander Uan-Zo-Li , Eugene Gorbatov , Harish Krishnamurthy , Alexander Lyakhov , Patrick Leung , Stephen Gunther , Arik Gihon , Khondker Ahmed , Philip Lehwalder , Sameer Shekhar , Vishram Pandit , Nimrod Angel , Michael Zelikson
Abstract: A power supply architecture combines the benefits of a traditional single stage power delivery, when there are no additional power losses in the integrated VR with low VID and low CPU losses of FIVR (fully integrated voltage regulator) and D-LVR (digital linear voltage regulator). The D-LVR is not in series with the main power flow, but in parallel. By placing the digital-LVR in parallel to a primary VR (e.g., motherboard VR), the CPU VID is lowered and the processor core power consumption is lowered. The power supply architecture reduces the guard band for input power supply level, thereby reducing the overall power consumption because the motherboard VR specifications can be relaxed, saving cost and power. The power supply architecture drastically increases the CPU performance at a small extra cost for the silicon and low complexity of tuning.
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公开(公告)号：US11275663B2
公开(公告)日：2022-03-15
申请号：US16896070
申请日：2020-06-08
Applicant: Intel Corporation
Inventor： Alexander Gendler , Nimrod Angel , Ameya Ambardekar , Sapumal Wijeratne , Vikas Vij , Tod Schiff , Alexander Uan-Zo-Li
IPC: G06F1/3296 , G06F11/30 , G06F11/07 , G06F9/30 , G06F9/4401
Abstract: A dedicated pin of a processor or system-on-chip (SoC) is used to indicate whether power level (e.g., charge, voltage, and/or current) of a battery falls below a threshold. The threshold can be predetermined or programmable. The battery is used to provide power to the processor and/or SoC. Upon determining that the power level of the battery falls below the threshold, the processor by-passes the conventional process of entering low performance or power mode, and directly throttles voltage and/or operating frequency of the processor. This allows the processor to continue to operate at low battery power. The fast transition (e.g., approximately 10 μS) from an active state to a low performance or power mode, in accordance with a logic level of the voltage on the dedicated pin, reduces decoupling capacitor design requirements, and makes it possible for the processor to adapt higher package power control settings (e.g., PL4).
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Patent Agency Ranking
公开(公告)号：US20210382805A1
公开(公告)日：2021-12-09
申请号：US16896070
申请日：2020-06-08
Applicant: Intel Corporation
Inventor： Alexander Gendler , Nimrod Angel , Ameya Ambardekar , Sapumal Wijeratne , Vikas Vij , Tod Schiff , Alexander Uan-Zo-Li
IPC: G06F11/30 , G06F11/07 , G06F1/3296 , G06F9/4401 , G06F9/30
Abstract: A dedicated pin of a processor or system-on-chip (SoC) is used to indicate whether power level (e.g., charge, voltage, and/or current) of a battery falls below a threshold. The threshold can be predetermined or programmable. The battery is used to provide power to the processor and/or SoC. Upon determining that the power level of the battery falls below the threshold, the processor by-passes the conventional process of entering low performance or power mode, and directly throttles voltage and/or operating frequency of the processor. This allows the processor to continue to operate at low battery power. The fast transition (e.g., approximately 10 μS) from an active state to a low performance or power mode, in accordance with a logic level of the voltage on the dedicated pin, reduces decoupling capacitor design requirements, and makes it possible for the processor to adapt higher package power control settings (e.g., PL4).
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公开(公告)号：US10203736B2
公开(公告)日：2019-02-12
申请号：US14128038
申请日：2013-06-28
Applicant: INTEL CORPORATION
Inventor： Hue Lam , Alexander Uan-Zo-Li , Patrick Leung
Abstract: A computing system may include a base portion to receive one or more first batteries, and a tablet portion having one or more electronic components and the tablet portion to receive one or more second batteries. The tablet portion may be configured to be coupled to and detached from the base portion. The computing system may also include circuitry to control a supply of voltage to one or more electronic components of the tablet portion from one or more first batteries at the base portion and from one or more second batteries at the tablet portion.
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公开(公告)号：US09787188B2
公开(公告)日：2017-10-10
申请号：US14316147
申请日：2014-06-26
Applicant: INTEL CORPORATION
Inventor： Alexander Uan-Zo-Li , Don Nguyen
CPC classification number: H02M3/1584 , H02M3/1588 , H02M2001/0009 , Y02B70/1466
Abstract: An on-package voltage regulation system includes a platform controller hub (PCH), a driver metal-oxide-semiconductor field-effect transistor (DRMOS) control unit, and a plurality of inductors coupled to an output node. The PCH receives a voltage feedback signal corresponding to an output voltage at the output node, and outputs a control signal based on a difference between the voltage feedback signal and a reference voltage. The DRMOS control unit includes a plurality of switch transistors and a DRMOS controller. The switch transistors are coupled to the output node through the plurality of inductors. The DRMOS controller includes logic to determine an output current based on the control signal from the PCH, and to determine a distribution of the output current through the plurality of inductors. Transistor drivers control the switch transistors to share the output current through the plurality of inductors based on the determined output current and distribution.
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公开(公告)号：US20170150255A1
公开(公告)日：2017-05-25
申请号：US15125413
申请日：2014-06-26
Applicant: Intel Corporation
Inventor： Jian Wang , Hong W. Wong , Xiaoguo Liang , Alexander Uan-Zo-Li
CPC classification number: H04R3/005 , G04G21/06 , H04R29/005 , H04R2430/23 , H04R2499/11
Abstract: An apparatus for audio beamforming is composed of a wearable device (100). Wearable device (100) includes a central processing unit (102), motion sensors (116) and microphones (118). Multiple microphones Memory Camera (118) of wearable device (100) are used to create a microphone array that can be beamformed towards the speaker's voice. A method for adjusting beam-forming is also provided.
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公开(公告)号：US20150381040A1
公开(公告)日：2015-12-31
申请号：US14316147
申请日：2014-06-26
Applicant: INTEL CORPORATION
Inventor： Alexander Uan-Zo-Li , Don Nguyen
IPC: H02M3/158
CPC classification number: H02M3/1584 , H02M3/1588 , H02M2001/0009 , Y02B70/1466
Abstract: An on-package voltage regulation system includes a platform controller hub (PCH), a driver metal-oxide-semiconductor field-effect transistor (DRMOS) control unit, and a plurality of inductors coupled to an output node. The PCH receives a voltage feedback signal corresponding to an output voltage at the output node, and outputs a control signal based on a difference between the voltage feedback signal and a reference voltage. The DRMOS control unit includes a plurality of switch transistors and a DRMOS controller. The switch transistors are coupled to the output node through the plurality of inductors. The DRMOS controller includes logic to determine an output current based on the control signal from the PCH, and to determine a distribution of the output current through the plurality of inductors. Transistor drivers control the switch transistors to share the output current through the plurality of inductors based on the determined output current and distribution.
Abstract translation: 封装上的电压调节系统包括平台控制器集线器（PCH），驱动器金属氧化物半导体场效应晶体管（DRMOS）控制单元和耦合到输出节点的多个电感器。 PCH接收与输出节点的输出电压相对应的电压反馈信号，并根据电压反馈信号和基准电压之差输出控制信号。 DRMOS控制单元包括多个开关晶体管和DRMOS控制器。 开关晶体管通过多个电感器耦合到输出节点。 DRMOS控制器包括基于来自PCH的控制信号确定输出电流并确定通过多个电感器的输出电流的分布的逻辑。 晶体管驱动器基于所确定的输出电流和分布来控制开关晶体管以共享通过多个电感器的输出电流。
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