公开(公告)号：US20240012459A1

公开(公告)日：2024-01-11

申请号：US18371949

申请日：2023-09-22

Applicant: Intel Corporation

Inventor： Francesc GUIM BERNAT ,  Karthik KUMAR ,  John J. BROWNE ,  Chris MACNAMARA ,  Patrick CONNOR

IPC: G06F1/26

CPC classification number: G06F1/266

Abstract: Examples described herein relate to receiving a configuration, wherein the configuration is to specify a first level of renewable energy utilized by one or more devices based on telemetry, wherein the telemetry comprises a level of renewable energy supplied to the one or more devices. Based on a second level of available supplied renewable energy, a portion of the first level of available supplied renewable energy can be allocated to one or more devices to perform the process. Based on a third level of available supplied renewable energy, increase renewable energy allocated to the one or more devices, to perform the process, to above the first level.

公开(公告)号：US20230353508A1

公开(公告)日：2023-11-02

申请号：US18220206

申请日：2023-07-10

Applicant: Intel Corporation

Inventor： Kapil SOOD ,  Patrick CONNOR ,  Scott P. DUBAL ,  James R. HEARN ,  Brendan RYAN ,  Chris MACNAMARA ,  Conor WALSH ,  David HUNT ,  John J. BROWNE ,  Kevin LAATZ

IPC: H04L49/00 ,  H04L47/625

CPC classification number: H04L49/3018 ,  H04L47/626

Abstract: Examples described herein relate to a system within a package. In some examples, the system includes a communication fabric and circuitry to adjust a packet throughput rate associated with the communication fabric based at least in part on incoming receive rate across multiple input ports and fabric usage. In some examples, the communication fabric is to communicatively couple devices in the package including one or more of: an accelerator, a processor, a memory, or a network interface device.

公开(公告)号：US20200150734A1

公开(公告)日：2020-05-14

申请号：US16747202

申请日：2020-01-20

Applicant: Intel Corporation

Inventor： Liang MA ,  Weigang LI ,  Madhusudana RAGHUPATRUNI ,  Hongjun NI ,  Xuekun HU ,  Changzheng WEI ,  Chris MACNAMARA ,  John J. BROWNE

IPC: G06F1/324 ,  G06F21/60 ,  G06F9/54 ,  G06F21/53

Abstract: Examples described herein provide for a first core to map a measurement of packet processing activity and operating parameters so that a second core can access the measurement of packet processing activity and potentially modify an operating parameter of the first core. The second core can modify operating parameters of the first core based on the measurement of packet processing activity. The first and second cores can be provisioned on start-up with a common key. The first and second cores can use the common key to encrypt or decrypt measurement of packet processing activity and operating parameters that are shared between the first and second cores. Accordingly, operating parameters of the first core can be modified by a different core while providing for secure modification of operating parameters.

公开(公告)号：US20190268269A1

公开(公告)日：2019-08-29

申请号：US16395774

申请日：2019-04-26

Applicant: Intel Corporation

Inventor： Patrick CONNOR ,  Andrey CHILIKIN ,  Brendan RYAN ,  Chris MACNAMARA ,  John J. BROWNE ,  Krishnamurthy JAMBUR SATHYANARAYANA ,  Stephen DOYLE ,  Tomasz KANTECKI ,  Anthony KELLY ,  Ciara LOFTUS ,  Fiona TRAHE

IPC: H04L12/803 ,  G06F9/455 ,  G06F8/76 ,  H04L12/26 ,  H04L12/851

Abstract: A computing device includes an appliance status table to store at least one of reliability and performance data for one or more network functions virtualization (NFV) appliances and one or more legacy network appliances. The computing device includes a load controller to configure an Internet Protocol (IP) filter rule to select a packet for which processing of the packet is to be migrated from a selected one of the one or more legacy network appliances to a selected one of the one or more NFV appliances, and to update the appliance status table with received at least one of reliability and performance data for the one or more legacy network appliances and the one or more NFV appliances. The computing device includes a packet distributor to receive the packet, to select one of the one or more NFV appliances based at least in part on the appliance status table, and to send the packet to the selected NFV appliance. Other embodiments are described herein.

公开(公告)号：US20190155645A1

公开(公告)日：2019-05-23

申请号：US16255480

申请日：2019-01-23

Applicant: Intel Corporation

Inventor： John J. BROWNE ,  Chris MACNAMARA ,  Tomasz KANTECKI

IPC: G06F9/48 ,  G06F9/50

Abstract: Packets received at an input port can be sub-divided into timeslots. A core or thread can process packets associated with a timeslot. The timeslot size can be increased or decreased based on utilization of a core that is allocated to process packets associated with a timeslot. A timeslot number can be assigned to each received packet. For transmission of the received packets, the timeslot number can be used to maintain an order of transmission to attempt to reduce out-of-order packet transmission.

公开(公告)号：US20190052530A1

公开(公告)日：2019-02-14

申请号：US16160176

申请日：2018-10-15

Applicant: Intel Corporation

Inventor： Mohammad Abdul AWAL ,  Jasvinder SINGH ,  Reshma PATTAN ,  David HUNT ,  Declan DOHERTY ,  Chris MACNAMARA

IPC: H04L12/24 ,  H04L12/26 ,  H04L12/861

Abstract: Examples include techniques for monitoring a data packet transfer rate at an interface queue, and based at least in part on a comparison of the data packet transfer rate to a threshold, assigning the interface queue from a core of a first class to a core of a second class or assigning the interface queue from a core of the second class to a core of the first class.

公开(公告)号：US20250013493A1

公开(公告)日：2025-01-09

申请号：US18889249

申请日：2024-09-18

Applicant: Intel Corporation

Inventor： Chris MACNAMARA ,  John J. BROWNE ,  Nilanjan PALIT ,  Chetan HIREMATH ,  Rory SEXTON ,  Conor WALSH ,  Kevin LAATZ ,  Andriy GLUSTSOV ,  Peter McCARTHY ,  Katelyn DONNELLAN ,  Vishal DEEP AJMERA ,  David HUNT ,  Gordon NOONAN

IPC: G06F9/48

Abstract: Examples described herein relate to circuitry to: monitor utilization data for a plurality of processes; determine one or more priority levels associated with at least one of the plurality of processes based on policy parameters; and adjust a frequency of operation of the interface circuitry based on the monitored utilization data and the determined priority levels of the processes. In some examples, adjust the frequency of operation of the interface circuitry is to prioritize frequency of operation requested by a higher priority workload over a frequency of operations requested by a lower priority workload.

公开(公告)号：US20240320043A1

公开(公告)日：2024-09-26

申请号：US18734891

申请日：2024-06-05

Applicant: Intel Corporation

Inventor： John J. BROWNE ,  Chris MACNAMARA

IPC: G06F9/48 ,  G06F9/455

CPC classification number: G06F9/4893 ,  G06F9/45558 ,  G06F2009/45595

Abstract: Examples described herein relate to determination of per-virtualized execution environment power usage based on an identifier of a processor that executes at least two virtualized execution environments, power usage of the processor, and number of virtualized execution environments executed by the processor.

公开(公告)号：US20220155847A1

公开(公告)日：2022-05-19

申请号：US17559170

申请日：2021-12-22

Applicant: Intel Corporation

Inventor： Konstantin ANANYEV ,  Anatoly BURAKOV ,  David HUNT ,  Chris MACNAMARA ,  Edwin VERPLANKE ,  Omkar MASLEKAR ,  Gilbert NEIGER ,  Rajesh M. SANKARAN

IPC: G06F1/3296 ,  G06F3/06

Abstract: Examples described herein relate to circuitry to cause a processor to enter reduced power consumption state and circuitry to, based on a write to one or more of multiple memory regions, cause the processor to exit reduced power consumption state, wherein the multiple memory regions store receive descriptors associated with one or more packets received by a network interface device. In some examples, multiple memory regions are defined by a driver of the network interface device. In some examples, the reduced power consumption state comprises a TPAUSE state.

公开(公告)号：US20210157626A1

公开(公告)日：2021-05-27

申请号：US17165694

申请日：2021-02-02

Applicant: Intel Corporation

Inventor： Amruta MISRA ,  Chris MACNAMARA ,  John J. BROWNE ,  Liang MA ,  Shobhi JAIN ,  David HUNT

IPC: G06F9/455 ,  G06F9/50 ,  G06F9/4401 ,  H04L12/24

Abstract: Examples described herein relate to circuitry to boot a virtualized execution environment (VEE) by use of system resources, wherein the system resources are allocated based on a priority level of the VEE. In some examples, the circuitry to boot a VEE by use of system resources is to access an identification of system resources to use to boot the VEE and priority level of the VEE from stored data. In some examples, the priority level of the VEE is based on a service level agreement (SLA), service level objective (SLO), or class of service (COS) that identifies boot time of the VEE. In some examples, the circuitry is to boot a VEE by use of system resources, wherein the system resources are allocated based on a priority level of the VEE and also based on a number of VEEs that boot concurrently.