公开(公告)号：US09686025B2

公开(公告)日：2017-06-20

申请号：US14991668

申请日：2016-01-08

Applicant: Intel Corporation

Inventor： Gyan Prakash ,  Nagasubramanian Gurumoorthy

IPC: H04B5/00 ,  H04B7/00 ,  H04B17/20 ,  H04W4/00

CPC classification number: H04B17/20 ,  H04B5/0031 ,  H04B5/0062 ,  H04W4/80

Abstract: Systems and methods may use proximate communication to retrieve information pertaining to a target device. In one example, the method may include detecting the target device within a vicinity of a user device, receiving an information request response communication including information pertaining to the target device, and receiving an operation request response communication including information pertaining to a performed operation.

公开(公告)号：US20170123484A1

公开(公告)日：2017-05-04

申请号：US15348432

申请日：2016-11-10

Applicant: INTEL CORPORATION

Inventor： Gyan Prakash ,  GURU RAJ ,  Nagasubramanian Gurumoorthy ,  Selim Aissi

IPC: G06F1/32 ,  H04R3/00

CPC classification number: H04R3/00 ,  G06F1/3209 ,  G06F1/3293 ,  Y02D10/122 ,  Y02D50/20

Abstract: A system may configure at least a low power engine (LPE) and network interface circuitry when transitioning from an active state to a low-power state. The network interface circuitry may be configured to receive information from a network and to store any received information containing audio information into a memory location. The LPE may be configured to monitor the memory location, to retrieve the stored information from the memory location, to generate audio information based on the stored information and to provide the audio information to audio circuitry for playback. It is also possible for the LPE to receive audio information from the audio circuitry, to generate information for transmission based on the audio information and to store the information into a second memory location. The network interface circuitry may then retrieve the stored information from the second memory location and transmit the information to the network.

公开(公告)号：US20220129031A1

公开(公告)日：2022-04-28

申请号：US17520296

申请日：2021-11-05

Applicant: Intel Corporation

Inventor： Vasudevan Srinivasan ,  Krishnakanth V. Sistla ,  Corey D. Gough ,  Ian M. Steiner ,  Nikhil Gupta ,  Vivek Garg ,  Ankush Varma ,  Sujal A. Vora ,  David P. Lerner ,  Joseph M. Sullivan ,  Nagasubramanian Gurumoorthy ,  William J. Bowhill ,  Venkatesh Ramamurthy ,  Chris MacNamara ,  John J. Browne ,  Ripan Das

IPC: G06F1/08 ,  G06F1/3203 ,  G06F9/30 ,  G06F9/455 ,  G06F1/324

Abstract: A processing device includes a plurality of processing cores, a control register, associated with a first processing core of the plurality of processing cores, to store a first base clock frequency value at which the first processing core is to run, and a power management circuit to receive a base clock frequency request comprising a second base clock frequency value, store the second base clock frequency value in the control register to cause the first processing core to run at the second base clock frequency value, and expose the second base clock frequency value on a hardware interface associated with the power management circuit.

公开(公告)号：US20210376939A1

公开(公告)日：2021-12-02

申请号：US17204178

申请日：2021-03-17

Applicant: Intel Corporation

Inventor： Gyan Prakash ,  Nagasubramanian Gurumoorthy

IPC: H04B17/20 ,  H04B5/00 ,  H04W4/80

Abstract: Systems and methods may use proximate communication to retrieve information pertaining to a target device. In one example, the method may include detecting the target device within a vicinity of a user device, receiving an information request response communication including information pertaining to the target device, and receiving an operation request response communication including information pertaining to a performed operation.

公开(公告)号：US11157002B2

公开(公告)日：2021-10-26

申请号：US15856310

申请日：2017-12-28

Applicant: Intel Corporation

Inventor： Rajesh Poornachandran ,  Nagasubramanian Gurumoorthy ,  Ravishankar Iyer ,  Lakshman Krishnamurthy

IPC: G05D1/00 ,  H04W4/46 ,  H04L29/08 ,  H04W4/38 ,  B64C39/02 ,  G05B15/02 ,  H04W4/70 ,  G01C21/00 ,  G06Q10/00 ,  G06F9/50 ,  H04W4/02

Abstract: Methods, systems, articles of manufacture and apparatus are disclosed to improve autonomous machine capabilities. An example disclosed apparatus includes an agent task manager to retrieve native sensor input data from a sensor of the agent, an agent characteristics engine to identify environmental characteristics based on the retrieved native sensor input data, and a resource allocation modifier to allocate a first quantity of resources of the agent based on a likelihood score associated with the environmental characteristics.

公开(公告)号：US20190049966A1

公开(公告)日：2019-02-14

申请号：US15856310

申请日：2017-12-28

Applicant: Intel Corporation

Inventor： Rajesh Poornachandran ,  Nagasubramanian Gurumoorthy ,  Ravishankar Iyer ,  Lakshman Krishnamurthy

IPC: G05D1/00 ,  H04W4/46 ,  H04L29/08 ,  H04W4/70 ,  H04W4/38 ,  B64C39/02 ,  G05B15/02

Abstract: Methods, systems, articles of manufacture and apparatus are disclosed to improve autonomous machine capabilities. An example disclosed apparatus includes an agent task manager to retrieve native sensor input data from a sensor of the agent, an agent characteristics engine to identify environmental characteristics based on the retrieved native sensor input data, and a resource allocation modifier to allocate a first quantity of resources of the agent based on a likelihood score associated with the environmental characteristics.

公开(公告)号：US09667360B2

公开(公告)日：2017-05-30

申请号：US14819930

申请日：2015-08-06

Applicant: Intel Corporation

Inventor： Gyan Prakash ,  Nagasubramanian Gurumoorthy

IPC: H04B5/00 ,  H04B7/00 ,  H04B17/20 ,  H04W4/00

CPC classification number: H04B17/20 ,  H04B5/0031 ,  H04B5/0062 ,  H04W4/80

Abstract: Systems and methods may use proximate communication to retrieve information pertaining to a target device. In one example, the method may include detecting the target device within a vicinity of a user device, receiving an information request response communication including information pertaining to the target device, and receiving an operation request response communication including information pertaining to a performed operation.

公开(公告)号：US20160127054A1

公开(公告)日：2016-05-05

申请号：US14991668

申请日：2016-01-08

Applicant: Intel Corporation

Inventor： Gyan Prakash ,  Nagasubramanian Gurumoorthy

IPC: H04B17/20 ,  H04B5/00

CPC classification number: H04B17/20 ,  H04B5/0031 ,  H04B5/0062 ,  H04W4/80

Abstract: Systems and methods may use proximate communication to retrieve information pertaining to a target device. In one example, the method may include detecting the target device within a vicinity of a user device, receiving an information request response communication including information pertaining to the target device, and receiving an operation request response communication including information pertaining to a performed operation.

公开(公告)号：US12066853B2

公开(公告)日：2024-08-20

申请号：US18329492

申请日：2023-06-05

Applicant: Intel Corporation

Inventor： Vasudevan Srinivasan ,  Krishnakanth V. Sistla ,  Corey D. Gough ,  Ian M. Steiner ,  Nikhil Gupta ,  Vivek Garg ,  Ankush Varma ,  Sujal A. Vora ,  David P. Lerner ,  Joseph M. Sullivan ,  Nagasubramanian Gurumoorthy ,  William J. Bowhill ,  Venkatesh Ramamurthy ,  Chris MacNamara ,  John J. Browne ,  Ripan Das

IPC: G06F1/08 ,  G06F1/3203 ,  G06F1/324 ,  G06F9/30 ,  G06F9/455

CPC classification number: G06F1/08 ,  G06F1/3203 ,  G06F1/324 ,  G06F9/30101 ,  G06F9/45558 ,  G06F2009/45591 ,  Y02D10/00

Abstract: A processing device includes a plurality of processing cores, a control register, associated with a first processing core of the plurality of processing cores, to store a first base clock frequency value at which the first processing core is to run, and a power management circuit to receive a base clock frequency request comprising a second base clock frequency value, store the second base clock frequency value in the control register to cause the first processing core to run at the second base clock frequency value, and expose the second base clock frequency value on a hardware interface associated with the power management circuit.

公开(公告)号：US20230315143A1

公开(公告)日：2023-10-05

申请号：US18329492

申请日：2023-06-05

Applicant: Intel Corporation

Inventor： Vasudevan Srinivasan ,  Krishnakanth V. Sistla ,  Corey D. Gough ,  Ian M. Steiner ,  Nikhil Gupta ,  Vivek Garg ,  Ankush Varma ,  Sujal A. Vora ,  David P. Lerner ,  Joseph M. Sullivan ,  Nagasubramanian Gurumoorthy ,  William J. Bowhill ,  Venkatesh Ramamurthy ,  Chris MacNamara ,  John J. Browne ,  Ripan Das

IPC: G06F1/08 ,  G06F1/3203 ,  G06F9/30 ,  G06F9/455 ,  G06F1/324

CPC classification number: G06F1/08 ,  G06F1/3203 ,  G06F9/30101 ,  G06F9/45558 ,  G06F1/324 ,  G06F2009/45591

Abstract: A processing device includes a plurality of processing cores, a control register, associated with a first processing core of the plurality of processing cores, to store a first base clock frequency value at which the first processing core is to run, and a power management circuit to receive a base clock frequency request comprising a second base clock frequency value, store the second base clock frequency value in the control register to cause the first processing core to run at the second base clock frequency value, and expose the second base clock frequency value on a hardware interface associated with the power management circuit.