FINE PITCH Z CONNECTIONS FOR FLIP CHIP MEMORY ARCHITECTURES WITH INTERPOSER

    公开(公告)号:US20200051956A1

    公开(公告)日:2020-02-13

    申请号:US16100149

    申请日:2018-08-09

    Abstract: A semiconductor package is disclosed. The semiconductor package includes a package substrate, at least one bottom die coupled to the package substrate, at least one interposer coupled to the package substrate and a top die above the at least one bottom die and the at least one interposer and coupled to the at least one bottom die and the at least one interposer. The semiconductor package also includes a plurality of pillars that connect the top die to the package substrate through the at least one interposer.

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