公开(公告)号：US10671416B2

公开(公告)日：2020-06-02

申请号：US15665382

申请日：2017-07-31

Applicant: INTEL CORPORATION

Inventor： Mahesh S. Natu ,  Shamanna M. Datta

IPC: G06F9/455 ,  G06F21/53 ,  G06F21/57 ,  G06F11/30

Abstract: Various embodiments are generally directed to the provision and use of various hardware and software components of a computing device to monitor the state of layered virtual machine (VM) monitoring software components. An apparatus includes a first processor element; and logic to receive an indication that a first timer has reached an end of a first period of time, monitor execution of a VMM (virtual machine monitor) watcher by a second processor element, determine whether the second processor element completes execution of the VMM watcher to verify integrity of a VMM before a second timer reaches an end of a second period of time, and transmit an indication of the determination to a computing device. Other embodiments are described and claimed.

公开(公告)号：US10169268B2

公开(公告)日：2019-01-01

申请号：US15270151

申请日：2016-09-20

Applicant: Intel Corporation

Inventor： Mahesh Natu ,  Thanunathan Rangarajan ,  Gautam Doshi ,  Shamanna M. Datta ,  Baskaran Ganesan ,  Mohan J. Kumar ,  Rajesh S. Parthasarathy ,  Frank Binns ,  Rajesh Nagaraja Murthy ,  Robert C. Swanson

IPC: G06F9/46 ,  G06F9/30 ,  G11C7/10 ,  G11C11/406 ,  G06F13/24 ,  G06F9/38

Abstract: In one embodiment, the present invention includes a processor that has an on-die storage such as a static random access memory to store an architectural state of one or more threads that are swapped out of architectural state storage of the processor on entry to a system management mode (SMM). In this way communication of this state information to a system management memory can be avoided, reducing latency associated with entry into SMM. Embodiments may also enable the processor to update a status of executing agents that are either in a long instruction flow or in a system management interrupt (SMI) blocked state, in order to provide an indication to agents inside the SMM. Other embodiments are described and claimed.

公开(公告)号：US20180143923A1

公开(公告)日：2018-05-24

申请号：US15873089

申请日：2018-01-17

Applicant: Intel Corporation

Inventor： Mahesh Natu ,  Thanunathan Rangarajan ,  Gautam Doshi ,  Shamanna M. Datta ,  Baskaran Ganesan ,  Mohan J. Kumar ,  Rajesh S. Parthasarathy ,  Frank Binns ,  Rajesh Nagaraja Murthy ,  Robert C. Swanson

IPC: G06F13/24 ,  G11C11/406 ,  G11C7/10 ,  G06F9/46 ,  G06F9/30 ,  G06F9/38

CPC classification number: G06F13/24 ,  G06F9/30101 ,  G06F9/3017 ,  G06F9/30189 ,  G06F9/3851 ,  G06F9/461 ,  G11C7/1072 ,  G11C11/40615

Abstract: In one embodiment, the present invention includes a processor that has an on-die storage such as a static random access memory to store an architectural state of one or more threads that are swapped out of architectural state storage of the processor on entry to a system management mode (SMM). In this way communication of this state information to a system management memory can be avoided, reducing latency associated with entry into SMM. Embodiments may also enable the processor to update a status of executing agents that are either in a long instruction flow or in a system management interrupt (SMI) blocked state, in order to provide an indication to agents inside the SMM. Other embodiments are described and claimed.

公开(公告)号：US20170252170A1

公开(公告)日：2017-09-07

申请号：US15432832

申请日：2017-02-14

Applicant: Intel Corporation

Inventor： Shamanna M. Datta ,  Alberto J. Munoz ,  Mahesh S. Natu ,  Scott T. Durrant

IPC: G06F21/12 ,  G06F21/53

CPC classification number: G06F9/45558 ,  G06F21/52 ,  G06F21/53 ,  G06F2009/45583 ,  G06F2009/45587 ,  G06F2221/2149

Abstract: An apparatus and method for hardware protection of a virtual machine monitor (VMM) runtime integrity watcher is described. A set of one or more hardware range registers that protect a contiguous memory space that is to store the VMM runtime integrity watcher. The set of hardware range registers are to protect the VMM runtime integrity watcher from being modified when loaded into the contiguous memory space. The VMM runtime integrity watcher, when executed, performs an integrity check on a VMM during runtime of the VMM.

公开(公告)号：US20170083393A1

公开(公告)日：2017-03-23

申请号：US14862488

申请日：2015-09-23

Applicant: INTEL CORPORATION

Inventor： Shamanna M. Datta ,  Murugasamy K. Nachimuthu ,  Mahesh S. Natu

IPC: G06F11/07 ,  G06F12/14 ,  G06F11/16 ,  G06F11/263 ,  G06F11/22

CPC classification number: G06F11/0727 ,  G06F11/1666 ,  G06F11/2215 ,  G06F11/2635 ,  G06F11/3656 ,  G06F12/1425 ,  G06F2212/1052

Abstract: Systems, apparatuses and methods may provide for receiving one or more debug communications and programming, via a bus, a set of debug registers with debug information corresponding to the one or more debug communications. Additionally, tunnel logic hardware may be instructed to transfer the debug information from the set of debug registers to one or more test access ports of an intelligent device such as a non-volatile memory storage unit having a microcontroller. In one example, if it is detected that debug permission has been granted during a boot process, a control status register may be unlocked. If, on the other hand, the debug permission is not detected during the boot process, the control status register may be locked. Accordingly, an enable bit of the control status register may be used to activate the tunnel logic hardware only if the control status register is unlocked.

公开(公告)号：US20160085965A1

公开(公告)日：2016-03-24

申请号：US14964020

申请日：2015-12-09

Applicant: Intel Corporation

Inventor： Shamanna M. Datta ,  Mohan J. Kumar

IPC: G06F21/53 ,  G06F21/85 ,  G06F21/74

CPC classification number: G06F21/53 ,  G06F21/00 ,  G06F21/74 ,  G06F21/85

Abstract: Methods and apparatus for initiating secure operations in a microprocessor system are described. In one embodiment, a system includes a processor to execute a secured enter instruction, and a chipset to cause the system to enter a quiescent state during execution of the secured enter instruction.

公开(公告)号：US09230116B2

公开(公告)日：2016-01-05

申请号：US13837640

申请日：2013-03-15

Applicant: Intel Corporation

Inventor： Shamanna M. Datta ,  Mohan J. Kumar

IPC: G06F21/57 ,  G06F21/60

CPC classification number: G06F21/60 ,  G06F21/57

Abstract: A technique to verify firmware. One embodiment of the invention uses a processor's micro-code to verify a system's firmware, such that the firmware can be included in a trusted chain of code along with the operating system.