GDDR MEMORY EXPANDER USING CMT CONNECTOR

    公开(公告)号:US20230007775A1

    公开(公告)日:2023-01-05

    申请号:US17871542

    申请日:2022-07-22

    Abstract: Methods and apparatus for GDDR (Graphics Double Date Rate) memory expander using compression mount technology (CMT) connectors. A CMT connector with a dedicated pinout for GDDR-based memory is provided that enables end users and manufacturers to change the amount of GDDR memory provided with a GPU card, accelerator card, or apparatus having other form factors. Memory could also be replaced in the event of a failure. In addition, embodiments are disclosed that support a split channel concept where there could be multiple devices (e.g., GDDR modules) with dedicated signals routed to each module.

    DIFFERENTIAL I/O CARD USING CMT CONNECTOR

    公开(公告)号:US20220360002A1

    公开(公告)日:2022-11-10

    申请号:US17871611

    申请日:2022-07-22

    Abstract: Methods and apparatus for differential I/O (input/output) cards using compression mount technology (CMT) connectors. Assemblies include a CMT connector having an array of spring-loaded pins or contacts that are configured to contact respective CMT contact pads on a pair of printed circuit board (PCBs), such as an add-in card (AIC) and a motherboard. Stacked assemblies are also disclosed including multiple CMT AIC or PCIe modules communicatively coupled using on module CMT connectors. The connector solutions may be used for AICs without changing the overall PCB form factor outline of existing AICs employing edge connectors. Under a stacked assembly of multiple CMT PCIe modules interconnected by on module CMT connectors, wiring in the PCBs is configured to provide signaling supporting multi-lane PCIe or CXL links for each CMT PCIe module. The CMT connector approach also is scalable and can support more pins/contacts to facilitate additional I/O bandwidth.

    CLOSED LOOP COMPRESSED CONNECTOR PIN

    公开(公告)号:US20210344130A1

    公开(公告)日:2021-11-04

    申请号:US17375558

    申请日:2021-07-14

    Abstract: A connector includes connector pins that have a loop of conductor. The connector connects a first printed circuit board (PCB) to a second PCB with compression of the connector pins between the two boards. In response to compression of the connector, the connector pins make electrical contact with themselves through the loop, while also connecting pads of the first PCB to pads of the second PCB.

    LEAF SPRING FOR IMPROVED MEMORY MODULE THAT CONSERVES MOTHERBOARD WIRING SPACE

    公开(公告)号:US20210328370A1

    公开(公告)日:2021-10-21

    申请号:US17326148

    申请日:2021-05-20

    Abstract: An apparatus is described. The apparatus includes a module having a connector along a center axis of the module. The module further includes a first set of semiconductor chips disposed in a first region of the module that resides between a first edge of the module and a first side of the connector, and, a second set of semiconductor chips disposed in a second region of the module that resides between a second opposite edge of the module and a second opposite side of the connector. A through hole does not exist between the first set of semiconductor chips and the first side of the connector nor between the second set of semiconductor chips and the second side of the connector. The module further includes a first through hole between a third edge of the connector and a third edge of the module and a second through hole between a fourth edge of the connector and a fourth edge of the module. The first and second through holes are to align with first and second studs that are to support a leaf spring when the leaf spring is bowed to press the connector into a printed circuit board.

    GROUND PIN FOR DEVICE-TO-DEVICE CONNECTION

    公开(公告)号:US20210313744A1

    公开(公告)日:2021-10-07

    申请号:US17214397

    申请日:2021-03-26

    Abstract: Examples described herein relate to a pin arrangement that includes a first signal pin; a second signal pin; and multiple parallel ground pins positioned between the first and second signal pins. In some examples, the multiple parallel ground pins are coupled to a single pin connector coupled to a first device and a single pin connector coupled to a second device. In some examples, a first leg of the multiple parallel ground pins is positioned parallel to a portion of the first signal pin and wherein a second leg of the multiple parallel ground pins is positioned parallel to a portion of the second signal pin. In some examples, the multiple parallel ground pins provide a 1:N signal to ground ratio for signals transmitted through at least a portion of the first and second signal pins, where N is greater than 1.

    CONNECTOR WITH STAGGERED PIN ORIENTATION

    公开(公告)号:US20210151916A1

    公开(公告)日:2021-05-20

    申请号:US17128803

    申请日:2020-12-21

    Abstract: Connectors with a staggered pin orientation can reduce crosstalk amongst signal pins. In one example, a connector to couple a card or module to a motherboard includes connector housing and a plurality of pins. Each of the plurality of pins includes two ends including a card or module-facing end to couple with the card or module and a motherboard-facing end to couple with the motherboard. Each of the plurality of pins includes a middle section in the connector housing. One or both of the ends include one or more bends relative to the middle section. The plurality of pins includes alternating signal pins and ground pins, wherein the signal pins having an opposite orientation relative to the ground pins.

    MEMORY DEVICE PACKAGE WITH NOISE SHIELDING
    19.
    发明申请

    公开(公告)号:US20200219825A1

    公开(公告)日:2020-07-09

    申请号:US16824544

    申请日:2020-03-19

    Abstract: A memory device includes a grounded molding. The memory device includes a substrate having a first surface for a memory die, where the substrate has ground vias through substrate to connect to a ground reference. The substrate has a ball grid array (BGA) on the opposite surface, including perimeter balls to connect to ground connections. The grounded molding includes an electrically conductive epoxy mold to cover the memory die, where the electrical conductivity of the molding, with the molding grounded can provide radio frequency interference (RFI) shielding.

    CONNECTOR WITH ANCHORING POWER PIN
    20.
    发明申请

    公开(公告)号:US20190296462A1

    公开(公告)日:2019-09-26

    申请号:US16316586

    申请日:2017-07-31

    Abstract: Anchoring power pins are described herein. In one embodiment, a system includes a circuit board including a through hole, and a connector for coupling a module with the circuit board. The connector includes housing including a module-facing side to receive the module and a circuit board-facing side to couple with the circuit board. The connector includes a conductive power pin to both physically anchor the connector to the circuit board and electrically couple the module with the circuit board, the conductive power pin including a tip protruding from the circuit board-facing side of the connector to extend into a matching through hole in the circuit board.

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