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11.发明授权公开(公告)号：US09787259B2
公开(公告)日：2017-10-10
申请号：US14934805
申请日：2015-11-06
Applicant: Infineon Technologies AG
Inventor： Haedong Jang , Richard Wilson , Timothy Canning , David Seebacher , Christian Schuberth
CPC classification number: H03F3/211 , H03F1/0294 , H03F1/56 , H03F3/193 , H03F3/604 , H03F2200/451 , H03F2203/21103
Abstract: Embodiments relate to outphasing amplifiers and amplification. One example system includes a signal splitter configured to receive an input signal and output a plurality of signals, wherein the signal splitter shifts each of the plurality of signals by a distinct phase based at least in part on a power of the input signal; a plurality of power amplifiers (PAs), each configured to amplify a distinct signal of the plurality of signals to generate a distinct amplified signal; a plurality of input matching networks, each coupled to a distinct PA of the plurality of PAs and configured to transform an input impedance of the coupled PA to an outphasing load condition based on the distinct signal the coupled PA is configured to amplify; and a combiner configured to combine the plurality of distinct amplified signals to generate an amplified input signal.
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12.发明申请公开(公告)号：US20170063308A1
公开(公告)日：2017-03-02
申请号：US14840963
申请日：2015-08-31
Applicant: Infineon Technologies AG
Inventor： David Seebacher , Christian Schuberth , Peter Singerl , Tim Canning , Richard Wilson , Haedong Jang
CPC classification number: H03F1/0277 , H03F1/0288 , H03F1/56 , H03F3/193 , H03F3/211 , H03F3/72 , H03F2200/318 , H03F2200/451 , H03F2203/7233
Abstract: A peaking amplifier is disclosed. The peaking amplifier includes a driver stage, a final stage, and an interstage matching network. The driver stage has a load impedance and is configured to generate a driver output based on an input signal. The final stage has a final stage input impedance and is configured to generate a peaking output based on the driver output. The interstage matching network is coupled to the driver stage and the final stage. The interstage matching network is configured to transform the final stage input impedance to the load impedance for the driver stage when the peaking amplifier is ON and to provide a short to an input of the final stage when the peaking amplifier is in an OFF state.
Abstract translation: 公开了一种峰值放大器。 峰值放大器包括驱动级，最后级和级间匹配网络。 驱动器级具有负载阻抗，并且被配置为基于输入信号产生驱动器输出。 最终阶段具有最终级输入阻抗，并且被配置为基于驱动器输出生成峰值输出。 阶段匹配网络耦合到驱动阶段和最后阶段。 阶段匹配网络被配置为当峰化放大器导通时将最终级输入阻抗转换为驱动级的负载阻抗，并且当峰化放大器处于关闭状态时，将最终级输入阻抗转换为最终级的输入。
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13.发明申请公开(公告)号：US20200313635A1
公开(公告)日：2020-10-01
申请号：US16903011
申请日：2020-06-16
Applicant: Infineon Technologies AG
Inventor： David Seebacher , Pantelis Sarais , Peter Singerl , Herwig Wappis
Abstract: Devices and methods for generating a bias voltage for a transceiver operating in time division multiplexing operation, and corresponding transceivers are provided. In this case, the bias voltage is controlled in guard intervals between transmission and reception of signals by the transceiver.
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公开(公告)号：US20190280360A1
公开(公告)日：2019-09-12
申请号：US16277398
申请日：2019-02-15
Applicant: Infineon Technologies AG
Inventor： David Seebacher , Andrea Del Chiaro , Christian Schuberth , Peter Singerl , Ji Zhao
Abstract: A device includes at least one electrically conductive structure and at least one stripline. The stripline includes stripline sections that are connected to one another in a series connection between a first terminal and a second terminal. A first subset of the stripline sections is arranged on a first side of the conductive structure and a second subset of the stripline sections is arranged on a second side of the conductive structure. The device also includes at least one conductive connection between the first subset of the stripline sections and the second subset of the stripline sections, wherein the at least one conductive connection is isolated from the at least one electrically conductive structure.
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公开(公告)号：US10069662B2
公开(公告)日：2018-09-04
申请号：US14937040
申请日：2015-11-10
Applicant: Infineon Technologies AG
Inventor： Yannis Papananos , David Seebacher , Nikolaos Alexiou , Franz Dielacher , Konstantinos Galanopoulos , Peter Singerl , Marc Tiebout
Abstract: A pulse width modulation system comprises an analog component and a digital component. The analog component operates to separate a local oscillator signal with different phase shifts and introduce an offset (i.e., a time delay) to analog signals being receive at an input with a tuning operation that fine tunes in the analog signals in the analog (continuous time) domain. The analog component comprises a plurality of analog delay lines that respectively process carrier signals having a different phase shifts. Digital delay lines convert the analog signals to digital square waves with the same time delay and at the same resolution as the analog output signal.
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Patent Agency Ranking
16.发明申请公开(公告)号：US20170133990A1
公开(公告)日：2017-05-11
申请号：US14934805
申请日：2015-11-06
Applicant: Infineon Technologies AG
Inventor： Haedong Jang , Richard Wilson , Timothy Canning , David Seebacher , Christian Schuberth
CPC classification number: H03F3/211 , H03F1/0294 , H03F1/56 , H03F3/193 , H03F3/604 , H03F2200/451 , H03F2203/21103
Abstract: Embodiments relate to outphasing amplifiers and amplification. One example system includes a signal splitter configured to receive an input signal and output a plurality of signals, wherein the signal splitter shifts each of the plurality of signals by a distinct phase based at least in part on a power of the input signal; a plurality of power amplifiers (PAs), each configured to amplify a distinct signal of the plurality of signals to generate a distinct amplified signal; a plurality of input matching networks, each coupled to a distinct PA of the plurality of PAs and configured to transform an input impedance of the coupled PA to an outphasing load condition based on the distinct signal the coupled PA is configured to amplify; and a combiner configured to combine the plurality of distinct amplified signals to generate an amplified input signal.
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公开(公告)号：US09520923B2
公开(公告)日：2016-12-13
申请号：US14704294
申请日：2015-05-05
Applicant: Infineon Technologies AG
Inventor： Peter Singerl , David Seebacher , Thomas Magesacher , Franz Dielacher
CPC classification number: H04L27/205 , H04B1/0475 , H04B1/0483 , H04L25/4902
Abstract: The present disclosure relates to a low-complexity transmitter architecture that drives phase modulators with digital signals to generate a pulse width modulated (PWM) signal that is transmitted by an antenna. In some embodiments, the system has a pre-processing element that generates first and second digital control signals from a digital baseband signal. A first phase modulation component introduces a first phase shift into a first local oscillator signal based upon the first control signal and generates a first digital signal corresponding to the first phase shift. A second phase modulation component introduces a second phase shift into the first local oscillator signal based upon the second control signal and generates a second digital signal corresponding to the second phase shift. A combination element is configured to combine the first and second digital output signals to generate an RF pulse width modulated (RF-PWM) signal.
Abstract translation: 本公开涉及一种低复杂度的发射机架构，其用数字信号驱动相位调制器以产生由天线发射的脉宽调制（PWM）信号。 在一些实施例中，系统具有从数字基带信号产生第一和第二数字控制信号的预处理元件。 第一相位调制分量基于第一控制信号将第一相移引入第一本地振荡器信号，并产生对应于第一相移的第一数字信号。 第二相位调制分量基于第二控制信号将第二相移引入第一本地振荡器信号，并产生对应于第二相移的第二数字信号。 组合元件被配置为组合第一和第二数字输出信号以产生RF脉冲宽度调制（RF-PWM）信号。
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公开(公告)号：US09419658B2
公开(公告)日：2016-08-16
申请号：US14580847
申请日：2014-12-23
Applicant: Infineon Technologies AG
Inventor： David Seebacher , Peter Singerl , Christian Schuberth , Martin Mataln
CPC classification number: H04B1/0475 , H03F3/24 , H04B1/0483 , H04B1/62 , H04B2001/0408 , H04B2001/0425
Abstract: A nonlinear distorter is configured to mitigate nonlinearity from a nonlinear component of a nonlinear system. The nonlinear distorter operates to model the nonlinearity as a function of a piecewise polynomial approximation applied to segments of a nonlinear function of the nonlinearity. The nonlinear distorter generates a model output that decreases the nonlinearity of the nonlinear component.
Abstract translation: 非线性变阻器被配置为从非线性系统的非线性分量减轻非线性。 非线性变异器用于将非线性模型作为应用于非线性的非线性函数的分段的分段多项式近似的函数。 非线性损耗器产生一个减小非线性分量非线性的模型输出。
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公开(公告)号：US20160182098A1
公开(公告)日：2016-06-23
申请号：US14580847
申请日：2014-12-23
Applicant: Infineon Technologies AG
Inventor： David Seebacher , Peter Singerl , Christian Schuberth , Martin Mataln
CPC classification number: H04B1/0475 , H03F3/24 , H04B1/0483 , H04B1/62 , H04B2001/0408 , H04B2001/0425
Abstract: A nonlinear distorter is configured to mitigate nonlinearity from a nonlinear component of a nonlinear system. The nonlinear distorter operates to model the nonlinearity as a function of a piecewise polynomial approximation applied to segments of a nonlinear function of the nonlinearity. The nonlinear distorter generates a model output that decreases the nonlinearity of the nonlinear component.
Abstract translation: 非线性变阻器被配置为从非线性系统的非线性分量减轻非线性。 非线性变异器用于将非线性模型作为应用于非线性的非线性函数的分段的分段多项式近似的函数。 非线性损耗器产生一个减小非线性分量非线性的模型输出。
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公开(公告)号：US20220329206A1
公开(公告)日：2022-10-13
申请号：US17227755
申请日：2021-04-12
Applicant: Infineon Technologies AG
Inventor： David Seebacher , Matteo Bassi , Dmytro Cherniak , Fabio Padovan
Abstract: In accordance with an embodiment, a method for operating a millimeter-wave power amplifier including an input transistor having an output node coupled to a load path of a cascode transistor includes: receiving a millimeter-wave transmit signal at a control node of the input transistor; amplifying the millimeter-wave transmit signal to form an output signal; providing the output signal to a load coupled to an output node of the cascode transistor; and adjusting a first DC bias current of the input transistor to form a substantially constant second DC bias current of the cascode transistor.
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