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公开(公告)号:US20180175909A1
公开(公告)日:2018-06-21
申请号:US15845746
申请日:2017-12-18
Applicant: Infineon Technologies AG
Inventor: Marc Tiebout , Michele Caruso
CPC classification number: H04B3/462 , H04B17/0085 , H04B17/12 , H04B17/14
Abstract: Devices and methods determining phase offsets are disclosed. A first test signal is transmitted from a first RF circuit part to a second RF circuit part, where a phase difference between the first test signal and a reference signal (ref) is measured. A second test signal is transmitted from the second RF circuit part to the first RF circuit part, where a second phase difference between the second test signal and the reference signal (ref) is measured. Phase offsets of a connection between the first and second circuit parts or of a line supplying the reference signal are determined based on the first and second phase differences.
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公开(公告)号:US20170237164A1
公开(公告)日:2017-08-17
申请号:US15583818
申请日:2017-05-01
Applicant: Infineon Technologies AG
Inventor: Marc Tiebout , Andrew Stonehouse , Michele Caruso , Angus McLachlan , Alan Harvey , William MacIsaac , Johann Wuertele
CPC classification number: H01Q3/2682 , H01Q3/36 , H04B7/02 , H04B7/04 , H04B7/0408 , H04B7/0413 , H04B7/0617 , H04B7/0667 , H04B7/0671 , H04B7/084 , H04B7/086 , H04B7/0897
Abstract: In accordance with an embodiment a beamforming circuit having a radio frequency (RF) front end and a plurality of beamforming delay circuits coupled to the RF front end. Each of the plurality of beamforming delay circuits includes a common delay circuit and a plurality of individual delay circuits coupled to the common delay circuit. Each of the individual delay circuits are configured to be coupled to an antenna element of a beamforming array.
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13.
公开(公告)号:US11322837B2
公开(公告)日:2022-05-03
申请号:US16799089
申请日:2020-02-24
Applicant: Infineon Technologies AG
Inventor: Marc Tiebout , Daniele Dal Maistro , Ivan Tsvelykh , Samo Vehovc , Peter Pfann
Abstract: A calibration method for a phased array system comprises sequentially injecting a tone into a first plurality of antenna elements of an antenna array, receiving the tone by a second plurality of antenna elements of the antenna array through parasitic coupling between the first plurality of antenna elements and the second plurality of antenna elements, measuring a plurality of phase errors between the first plurality of antenna elements and the second plurality of antenna elements, populating a lookup table with the plurality of phase errors, and calibrating a plurality of phase shifters associated with a plurality of channels in the phased array system using the plurality of phase errors in the lookup table.
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公开(公告)号:US10958298B2
公开(公告)日:2021-03-23
申请号:US16683531
申请日:2019-11-14
Applicant: Infineon Technologies AG
Inventor: Marc Tiebout , Michele Caruso , Daniele Dal Maistro , Carlo Rubino
Abstract: Techniques (implemented in circuit arrangements, methods, computer instructions) are disclosed which permit digital pre-distortion for amplifiers. A common signal source provides a common analog signal from a digital input signal; a plurality of amplifiers amplifies a split signal which is a split version of the common analog signal; a built-in test circuit is configured to provide distortion information associated to distortion affecting the amplifier. The common signal source implements a signal conditioner to perform, in a signal path of the digital input signal, a feed-forward pre-distortion of the digital input signal according to a pre-distortion relationship mapping the digital input signal onto a pre-distorted version. The signal conditioner is configured to adjust the pre-distortion relationship in dependence on the distortion information.
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公开(公告)号:US09935367B2
公开(公告)日:2018-04-03
申请号:US15583818
申请日:2017-05-01
Applicant: Infineon Technologies AG
Inventor: Marc Tiebout , Andrew Stonehouse , Michele Caruso , Angus McLachlan , Alan Harvey , William MacIsaac , Johann Wuertele
CPC classification number: H01Q3/2682 , H01Q3/36 , H04B7/02 , H04B7/04 , H04B7/0408 , H04B7/0413 , H04B7/0617 , H04B7/0667 , H04B7/0671 , H04B7/084 , H04B7/086 , H04B7/0897
Abstract: In accordance with an embodiment a beamforming circuit having a radio frequency (RF) front end and a plurality of beamforming delay circuits coupled to the RF front end. Each of the plurality of beamforming delay circuits includes a common delay circuit and a plurality of individual delay circuits coupled to the common delay circuit. Each of the individual delay circuits are configured to be coupled to an antenna element of a beamforming array.
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公开(公告)号:US20180007649A1
公开(公告)日:2018-01-04
申请号:US15197331
申请日:2016-06-29
Applicant: Infineon Technologies AG
Inventor: Daniele Dal Maistro , Marc Tiebout
CPC classification number: H04W56/0035 , H04B7/0617 , H04L1/246 , H04L5/005 , H04L27/233 , H04L2027/0016 , H04L2027/0026
Abstract: A signal detector device and method includes a quadrature demodulator configured to receive an input signal, a first reference signal, and a second reference signal in quadrature with the first reference signal, the quadrature demodulator further configured to produce a plurality of output signals from the input signal and the first and the second reference signal, the plurality of output signals indicating the amplitude and phase of the input signal, and one or more inverting circuits, the inverting circuits having a first and a second programmable output polarity, the plurality of output signals being output by the quadrature demodulator when the inverting circuits are set to the first programmable output polarity, the plurality of output signals being inverted and output by the quadrature demodulator when the inverting circuits are set to the second programmable output polarity
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公开(公告)号:US20170134194A1
公开(公告)日:2017-05-11
申请号:US14937040
申请日:2015-11-10
Applicant: Infineon Technologies AG
Inventor: Yannis Papananos , David Seebacher , Nikolaos Alexiou , Franz Dielacher , Konstantinos Galanopoulos , Peter Singerl , Marc Tiebout
IPC: H04L25/49
CPC classification number: H04L25/4902 , H04L27/18
Abstract: A pulse width modulation system comprises an analog component and a digital component. The analog component operates to separate a local oscillator signal with different phase shifts and introduce an offset (i.e., a time delay) to analog signals being receive at an input with a tuning operation that fine tunes in the analog signals in the analog (continuous time) domain. The analog component comprises a plurality of analog delay lines that respectively process carrier signals having a different phase shifts. Digital delay lines convert the analog signals to digital square waves with the same time delay and at the same resolution as the analog output signal.
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公开(公告)号:US20160006394A1
公开(公告)日:2016-01-07
申请号:US14323718
申请日:2014-07-03
Applicant: Infineon Technologies AG
Inventor: Andrea Bevilacqua , Marc Tiebout
IPC: H03B5/12
CPC classification number: H03B5/1212 , H03B1/00 , H03B5/1215 , H03B5/1228 , H03B5/124 , H03B5/1243 , H03B5/1256 , H03F3/04 , H03F3/45278
Abstract: In accordance with an embodiment, an oscillator includes a tank circuit and an oscillator core circuit having a plurality of cross-coupled compound transistors coupled to the tank circuit. Each of the plurality of compound transistors includes a bipolar transistor and a field effect transistor (FET) having a source coupled to a base of the bipolar transistor.
Abstract translation: 根据一个实施例,振荡器包括一个振荡电路和一个具有耦合到储能电路的多个交叉耦合复合晶体管的振荡器核心电路。 多个复合晶体管中的每一个包括双极晶体管和具有耦合到双极晶体管的基极的源极的场效应晶体管(FET)。
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公开(公告)号:US11165515B2
公开(公告)日:2021-11-02
申请号:US16683488
申请日:2019-11-14
Applicant: Infineon Technologies AG
Inventor: Marc Tiebout , Michele Caruso , Daniele Dal Maistro , Carlo Rubino
Abstract: A circuit includes an amplifier and pre-distortion circuit. The amplifier amplifies a modulated signal. The signal pre-distortion circuit performs a feed-forward pre-distortion of the modulated signal in a signal path in which the amplifier resides. The signal pre-distortion circuit includes: i) an envelope detector configured operative to provide an envelope information describing an envelope of the modulated signal; and ii) a built-in test circuit that determines distortion information describing a distortion in the signal path caused by amplitude variations. The signal pre-distortion circuit performs the feed-forward pre-distortion of the modulated signal on the basis of the distortion information.
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公开(公告)号:US20190081633A1
公开(公告)日:2019-03-14
申请号:US16189949
申请日:2018-11-13
Applicant: Infineon Technologies AG , Politecnico Di Milano
Inventor: Dmytro Cherniak , Salvatore Levantino , Marc Tiebout , Roberto Nonis
CPC classification number: H03L7/24 , H03B5/1212 , H03B5/1215 , H03B5/1228 , H03B5/124 , H03B2201/0208 , H03L7/093 , H03L7/0991 , H03L7/197 , H03L2207/50
Abstract: The disclosure is directed to a frequency synthesizer circuit including digitally controlled oscillator (DCO) and an injection locked digitally controlled oscillator (ILD). The ILD outputs a signal with a frequency that is some fraction of the frequency of the DCO output signal and locked in phase to the DCO output signal. The frequency synthesizer circuit drives the ILD with the same modulation input signal that drives the DCO, with the modulation input signal scaled to account for any mismatch between the gains of the DCO and ILD. Driving the ILD with the same, scaled modulation signal as the main DCO minimizes the frequency offset between the DCO output signal and the divided natural oscillation frequency of the ILD. Minimizing the frequency offset makes the lock of the ILD more robust and reduces jitter contribution from the ILD.
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