公开(公告)号：US10411883B2

公开(公告)日：2019-09-10

申请号：US15296940

申请日：2016-10-18

Applicant: Infineon Technologies AG

Inventor： Martin Pernull ,  Andreas Kalt ,  Gerhard Pichler ,  Franz Wachter ,  Bernhard Wotruba

IPC: G06F21/00 ,  H04L9/06

Abstract: Devices for sampling a plurality of input signals are provided, wherein a sampling device is controlled to sample the input signals in a random order with additional delays. Other embodiments relate to voltage monitoring systems and corresponding methods.

公开(公告)号：US10056916B2

公开(公告)日：2018-08-21

申请号：US15675091

申请日：2017-08-11

Applicant: Infineon Technologies AG

Inventor： Martin Pernull ,  Peter Bogner

IPC: H03M1/12 ,  H03M3/00 ,  G11C27/02

CPC classification number: H03M3/368 ,  G11C7/02 ,  G11C27/024 ,  H03M1/0626 ,  H03M1/1215 ,  H03M3/422 ,  H03M3/496

Abstract: A circuit (100) comprises an input terminal (141) which is configured to receive an analog input signal (142). The circuit (100) also comprises a combination element (601) which is configured to combine a number of time-displaced signal values of the input signal (142) to form an analog combination signal (144). The circuit (100) also comprises a quantizer (131) having a converter core which is configured to receive the combination signal (144) via passive charge redistribution from the combination element (601) and to convert it into a digital output signal (145). Such techniques can thus provide for an analog/digital conversion with filtering in the analog domain.

公开(公告)号：US20180198460A1

公开(公告)日：2018-07-12

申请号：US15742435

申请日：2016-07-05

Applicant: Infineon Technologies AG

Inventor： Peter Bogner ,  Andreas Kalt ,  Jaafar Mejri ,  Martin Pernull

IPC: H03M1/10

CPC classification number: H03M1/1071 ,  H03M1/109 ,  H03M1/12 ,  H03M1/468 ,  H03M1/804

Abstract: Representative implementations of devices and techniques provide a built-in self-test (BIST) for an analog-to-digital converter (ADC). Stimuli needed to test an ADC are generated within the chip containing the ADC. Evaluation circuitry is also available on-chip. Generation and evaluation circuits and systems are based on existing circuits and/or components of the chip.