公开(公告)号：US20180148322A1

公开(公告)日：2018-05-31

申请号：US15692938

申请日：2017-08-31

Applicant: Infineon Technologies AG

Inventor： Dominic Maier ,  Matthias Steiert ,  Chau Fatt Chiang ,  Christian Geissler ,  Bernd Goller ,  Thomas Kilger ,  Johannes Lodermeyer ,  Franz-Xaver Muehlbauer ,  Chee Yang Ng ,  Beng Keh See ,  Claus Waechter

IPC: B81B7/00 ,  B81C1/00

Abstract: A semiconductor package includes a semiconductor die having a sensor structure disposed at a first side of the semiconductor die, and a first port extending through the semiconductor die from the first side to a second side of the semiconductor die opposite the first side, so as to provide a link to the outside environment. Corresponding methods of manufacture are also provided.

公开(公告)号：US20170081175A1

公开(公告)日：2017-03-23

申请号：US15248651

申请日：2016-08-26

Applicant: Infineon Technologies AG

Inventor： Matthias Steiert ,  Kok Yau Chua ,  Chu Hua Goh ,  Woon Yau Lim ,  Christina Yeong

IPC: B81B7/00 ,  B81C1/00

CPC classification number: B81B7/007 ,  B81B2201/0264 ,  B81C1/00301 ,  B81C1/00309 ,  B81C2203/0154 ,  H01L2224/16245 ,  H01L2924/1815

Abstract: The electronic device comprises a semiconductor chip comprising a first main face, a second main face opposite to the first main face, side faces connecting the first and second main faces, and a sensor element or actuator element disposed at the first main face, and a substrate, wherein the semiconductor chip is disposed above the substrate, the first main face of the semiconductor chip facing the substrate, wherein the substrate comprises a substrate opening, the substrate opening permitting passage of signals to the sensor element or from the actuator element.

公开(公告)号：US20210005568A1

公开(公告)日：2021-01-07

申请号：US17023986

申请日：2020-09-17

Applicant: Infineon Technologies AG

Inventor： Matthias Steiert ,  Karolina Gierl

IPC: H01L23/00 ,  B81B7/02 ,  H01L25/065 ,  B81C1/00

Abstract: A device includes a base substrate with a sensor component arranged thereon; a spacer layer on the base substrate, wherein the spacer layer is structured in order to predefine a cavity region, in which the sensor component is arranged in an exposed fashion on the base substrate, and a DAF tape element (DAF=Die-Attach-Film) on a stack element, wherein the DAF tape element mechanically fixedly connects the stack element to the spacer layer arranged on the base substrate and to obtain the cavity region.

公开(公告)号：US20200249380A1

公开(公告)日：2020-08-06

申请号：US16779928

申请日：2020-02-03

Applicant: Infineon Technologies AG

Inventor： Stephan Pindl ,  Matthias Steiert

IPC: G02B5/20 ,  B81C1/00 ,  H05B3/00

Abstract: A method for manufacturing integrated IR (IR=infrared) emitter elements having an optical filter comprises back side etching through a carrier substrate, forming adhesive spacer elements on a conductive layer on the carrier substrate, placing a filter substrate having a filter carrier substrate and a filter layer on the adhesive spacer elements, fixing the adhesive spacer elements to the carrier substrate and the filter substrate by curing, pre-dicing through the filter substrate for exposing the contact pads of the structured conductive layer, and dicing through the frame structure in the carrier substrate for separating the integrated IR emitter elements having the optical filter.

公开(公告)号：US20200156933A1

公开(公告)日：2020-05-21

申请号：US16748087

申请日：2020-01-21

Applicant: Infineon Technologies AG

Inventor： Matthias Steiert ,  Christian Geissler ,  Karolina Zogal

IPC: B81C1/00 ,  B81B7/00 ,  B32B15/04 ,  H01L23/31

Abstract: A production method includes providing a semiconductor substrate with a wiring layer stack having cutouts on a first main surface region of the semiconductor substrate at which MEMS components are arranged in an exposed manner in the cutouts and projecting through contact elements are arranged at metallization regions of the wiring layer stack; applying a b-stage material layer cured in an intermediate stage on the wiring layer stack, such that the cutouts are covered by the b-stage material layer and the vertically projecting through contact elements are introduced into the b-stage material layer; curing the b-stage material layer to obtain a cured b-stage material layer; thinning the cured b-stage material layer; and applying a redistribution layer (RDL) structure on the thinned, cured b-stage material layer to obtain an electrical connection between the wiring layer stack and the RDL structure via the through contact elements.

公开(公告)号：US10584028B2

公开(公告)日：2020-03-10

申请号：US15975243

申请日：2018-05-09

Applicant: Infineon Technologies AG

Inventor： Matthias Steiert ,  Christian Geissler ,  Karolina Zogal

IPC: B81C1/00 ,  H01L23/31 ,  B32B15/04 ,  B81B7/00

Abstract: A production method includes providing a semiconductor substrate with a wiring layer stack having cutouts on a first main surface region of the semiconductor substrate at which MEMS components are arranged in an exposed manner in the cutouts and projecting through contact elements are arranged at metallization regions of the wiring layer stack; applying a b-stage material layer cured in an intermediate stage on the wiring layer stack, such that the cutouts are covered by the b-stage material layer and the vertically projecting through contact elements are introduced into the b-stage material layer; curing the b-stage material layer to obtain a cured b-stage material layer; thinning the cured b-stage material layer; and applying a redistribution layer (RDL) structure on the thinned, cured b-stage material layer to obtain an electrical connection between the wiring layer stack and the RDL structure via the through contact elements.

公开(公告)号：US10549985B2

公开(公告)日：2020-02-04

申请号：US15692938

申请日：2017-08-31

Applicant: Infineon Technologies AG

Inventor： Dominic Maier ,  Matthias Steiert ,  Chau Fatt Chiang ,  Christian Geissler ,  Bernd Goller ,  Thomas Kilger ,  Johannes Lodermeyer ,  Franz-Xaver Muehlbauer ,  Chee Yang Ng ,  Beng Keh See ,  Claus Waechter

IPC: B81B7/00 ,  B81C1/00

Abstract: A semiconductor package includes a semiconductor die having a sensor structure disposed at a first side of the semiconductor die, and a first port extending through the semiconductor die from the first side to a second side of the semiconductor die opposite the first side, so as to provide a link to the outside environment. Corresponding methods of manufacture are also provided.

公开(公告)号：US20180327258A1

公开(公告)日：2018-11-15

申请号：US15975243

申请日：2018-05-09

Applicant: Infineon Technologies AG

Inventor： Matthias Steiert ,  Christian Geissler ,  Karolina Zogal

IPC: B81C1/00 ,  B81B7/00 ,  B32B15/04 ,  H01L23/31

CPC classification number: B81C1/00333 ,  B32B15/043 ,  B81B7/0032 ,  B81C1/00301 ,  H01L23/315

Abstract: A production method includes providing a semiconductor substrate with a wiring layer stack having cutouts on a first main surface region of the semiconductor substrate at which MEMS components are arranged in an exposed manner in the cutouts and projecting through contact elements are arranged at metallization regions of the wiring layer stack; applying a b-stage material layer cured in an intermediate stage on the wiring layer stack, such that the cutouts are covered by the b-stage material layer and the vertically projecting through contact elements are introduced into the b-stage material layer; curing the b-stage material layer to obtain a cured b-stage material layer; thinning the cured b-stage material layer; and applying a redistribution layer (RDL) structure on the thinned, cured b-stage material layer to obtain an electrical connection between the wiring layer stack and the RDL structure via the through contact elements.