公开(公告)号：US11869865B2

公开(公告)日：2024-01-09

申请号：US17389721

申请日：2021-07-30

Applicant: Infineon Technologies AG

Inventor： Thomas Bemmerl ,  Chooi Mei Chong ,  Edward Myers ,  Michael Stadler

IPC: H01L23/00

CPC classification number: H01L24/37 ,  H01L24/84 ,  H01L2224/37012 ,  H01L2224/84345 ,  H01L2224/84815 ,  H01L2924/3656

Abstract: A semiconductor device includes: a carrier having a die pad and a contact; a semiconductor die having opposing first and second main sides and being attached to the die pad by a first solder joint such that the second main side faces the die pad; and a contact clip having a first contact region and a second contact region. The first contact is attached to the first main side by a second solder joint. The second contact region is attached to the contact by a third solder joint. The first contact region has a convex shape facing towards the first main side such that a distance between the first main side and the first contact region increases from a base of the convex shape towards an edge of the first contact region. The base runs along a line that is substantially perpendicular to a longitudinal axis of the contact clip.

公开(公告)号：US20230094794A1

公开(公告)日：2023-03-30

申请号：US18073090

申请日：2022-12-01

Applicant: Infineon Technologies AG

Inventor： Thomas Stoek ,  Michael Stadler ,  Mohd Hasrul Zulkifli

IPC: H01L23/00 ,  H01L23/495

Abstract: A semiconductor device includes a semiconductor die attached to a substrate and a metal clip attached to a side of the semiconductor die facing away from the substrate by a soldered joint. The metal clip has a plurality of slots dimensioned so as to take up at least 10% of a solder paste that reflowed to form the soldered joint. Corresponding methods of production are also described.

公开(公告)号：US20220068851A1

公开(公告)日：2022-03-03

申请号：US17404031

申请日：2021-08-17

Applicant: Infineon Technologies AG

Inventor： Michael Stadler ,  Paul Armand Asentista Calo

IPC: H01L23/00

Abstract: A semiconductor chip includes a chip pad arranged at a surface of the semiconductor chip. A dielectric layer is arranged at the surface of the semiconductor chip. The dielectric layer has an opening within which a contact portion of the chip pad is exposed, the opening having at least one straight side. The dielectric layer includes a solder flux outgassing trench arranged separate from and in the vicinity of the at least one straight side of the opening and that extends laterally beyond sides of the opening adjoining the straight side.

公开(公告)号：US20210358877A1

公开(公告)日：2021-11-18

申请号：US17389721

申请日：2021-07-30

Applicant: Infineon Technologies AG

Inventor： Thomas Bemmerl ,  Chooi Mei Chong ,  Edward Myers ,  Michael Stadler

IPC: H01L23/00

Abstract: A semiconductor device includes: a carrier having a die pad and a contact; a semiconductor die having opposing first and second main sides and being attached to the die pad by a first solder joint such that the second main side faces the die pad; and a contact clip having a first contact region and a second contact region. The first contact is attached to the first main side by a second solder joint. The second contact region is attached to the contact by a third solder joint. The first contact region has a convex shape facing towards the first main side such that a distance between the first main side and the first contact region increases from a base of the convex shape towards an edge of the first contact region. The base runs along a line that is substantially perpendicular to a longitudinal axis of the contact clip.

公开(公告)号：US20210233839A1

公开(公告)日：2021-07-29

申请号：US16774800

申请日：2020-01-28

Applicant: Infineon Technologies AG

Inventor： Paul Armand Asentista Calo ,  Tek Keong Gan ,  Ser Yee Keh ,  Tien Heng Lem ,  Fong Lim ,  Michael Stadler ,  Mei Qi Tay

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L21/60

Abstract: An electrical interconnect structure includes a bond pad having a substantially planar bonding surface, and a solder enhancing structure that is disposed on the bonding surface and includes a plurality of raised spokes that are each elevated from the bonding surface. Each of the raised spokes has a lower wettability relative to a liquefied solder material than the bonding surface. Each of the raised spokes extend radially outward from a center of the solder enhancing structure.

公开(公告)号：US20200168575A1

公开(公告)日：2020-05-28

申请号：US16695866

申请日：2019-11-26

Applicant: Infineon Technologies AG

Inventor： Thomas Bemmerl ,  Chooi Mei Chong ,  Edward Myers ,  Michael Stadler

IPC: H01L23/00

Abstract: A semiconductor device includes: a carrier having a die pad and a contact; a semiconductor die having opposing first and second main sides and being attached to the die pad by a first solder joint such that the second main side faces the die pad; and a contact clip having a first contact region and a second contact region. The first contact is attached to the first main side by a second solder joint. The second contact region is attached to the contact by a third solder joint. The first contact region has a convex shape facing towards the first main side such that a distance between the first main side and the first contact region increases from a base of the convex shape towards an edge of the first contact region. The base runs along a line that is substantially perpendicular to a longitudinal axis of the contact clip.

公开(公告)号：US20200152554A1

公开(公告)日：2020-05-14

申请号：US16678000

申请日：2019-11-08

Applicant: Infineon Technologies AG

Inventor： Michael Stadler ,  Thomas Bemmerl

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/00 ,  H01L21/48

Abstract: A clip, a semiconductor package, and a method are disclosed. In one example the clip includes a die attach portion having a first main face and a second main face opposite to the first main face, and at least one through-hole extending between the first and second main faces and including a curved transition from an inner wall of the at least one through-hole to the first main face.

公开(公告)号：US12132017B2

公开(公告)日：2024-10-29

申请号：US18483977

申请日：2023-10-10

Applicant: Infineon Technologies AG

Inventor： Michael Stadler ,  Paul Armand Asentista Calo

IPC: H01L23/00

CPC classification number: H01L24/05 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/02245 ,  H01L2224/02255 ,  H01L2224/0401 ,  H01L2224/13026 ,  H01L2224/81024 ,  H01L2224/81815 ,  H01L2924/13091

Abstract: A method of soldering a semiconductor chip to a chip carrier includes arranging a solder deposit including solder and solder flux between a contact portion of the carrier and a contact portion of a chip pad arranged at a surface of the semiconductor chip. Arranging a dielectric layer at the surface of the semiconductor chip. The dielectric layer includes an opening within which the contact portion of the chip pad is exposed. The dielectric layer further includes arranging a solder flux outgassing trench separate from the opening and intersecting with the solder deposit. The method further includes melting the solder deposit which causes liquid solder to be moved over the solder flux outgassing trench for extraction of flux gas.

公开(公告)号：US11901257B2

公开(公告)日：2024-02-13

申请号：US16701251

申请日：2019-12-03

Applicant: Infineon Technologies AG

Inventor： Thomas Stoek ,  Michael Stadler

IPC: H01L23/367 ,  H01L23/495 ,  H01L21/56 ,  H01L23/373 ,  H01L23/31 ,  H01L21/48 ,  H01L23/498

CPC classification number: H01L23/3675 ,  H01L21/4882 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/3736 ,  H01L23/49568 ,  H01L23/49861

Abstract: A semiconductor package includes a semiconductor chip, an encapsulation body encapsulating the semiconductor chip, and a metal sheet having a first sheet surface and an opposite second sheet surface. The first sheet surface is exposed at the encapsulation body. The semiconductor chip is arranged at the second sheet surface. The first sheet surface has a pattern having first subdivisions having a first average roughness and second subdivisions having a second average roughness. The first average roughness is greater than the second average roughness.

公开(公告)号：US11869830B2

公开(公告)日：2024-01-09

申请号：US16678000

申请日：2019-11-08

Applicant: Infineon Technologies AG

Inventor： Michael Stadler ,  Thomas Bemmerl

IPC: H01L23/31 ,  H01L23/495 ,  H01L23/00 ,  H01L21/48

CPC classification number: H01L23/49517 ,  H01L21/4828 ,  H01L23/3121 ,  H01L23/49541 ,  H01L23/49582 ,  H01L24/83 ,  H01L2224/83815

Abstract: A clip, a semiconductor package, and a method are disclosed. In one example the clip includes a die attach portion having a first main face and a second main face opposite to the first main face, and at least one through-hole extending between the first and second main faces and including a curved transition from an inner wall of the at least one through-hole to the first main face.