公开(公告)号：US20150364550A1

公开(公告)日：2015-12-17

申请号：US14306071

申请日：2014-06-16

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim SCHULZE ,  Jens Peter KONRATH ,  Roland RUPP ,  Christian HECHT

IPC: H01L29/16 ,  H01L21/02

CPC classification number: H01L29/1608 ,  H01L21/0465 ,  H01L21/26506 ,  H01L21/762 ,  H01L21/76254 ,  H01L29/7395 ,  H01L29/7827

Abstract: Representative implementations of devices and techniques provide an optimized layer for a semiconductor component. In an example, a doped portion of a wafer, forming a substrate layer may be transferred from the wafer to an acceptor, or handle wafer. A component layer may be applied to the substrate layer. The acceptor wafer is detached from the substrate layer. In some examples, further processing may be executed with regard to the substrate and/or component layers.

Abstract translation: 器件和技术的代表性实现为半导体部件提供优化的层。 在一个示例中，形成衬底层的晶片的掺杂部分可以从晶片转移到受主或处理晶片。 组分层可以施加到基底层。 受主晶片与衬底层分离。 在一些示例中，可以针对衬底和/或组件层执行进一步的处理。

公开(公告)号：US20130069065A1

公开(公告)日：2013-03-21

申请号：US13621834

申请日：2012-09-17

Applicant: Infineon Technologies AG

Inventor： Anton MAUDER ,  Roland RUPP ,  Hans-Joachim SCHULZE

IPC: H01L29/04 ,  H01L29/78 ,  H01L21/336

CPC classification number: H01L29/66068 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/165 ,  H01L29/402 ,  H01L29/408 ,  H01L29/417 ,  H01L29/41766 ,  H01L29/42376 ,  H01L29/7802 ,  H01L29/7811 ,  H01L29/7813

Abstract: A semiconductor device may include a semiconductor body of silicon carbide (SiC) and a field effect transistor. The field effect transistor has the semiconductor body that includes a drift region. A polycrystalline silicon layer is formed over or on the semiconductor body, wherein the polycrystalline silicon layer has an average particle size in the range of 10 nm to 5 μm, and includes a source region and a body region. Furthermore, the field effect transistor includes a layer adjacent to the body region gate structure.

Abstract translation: 半导体器件可以包括碳化硅（SiC）的半导体本体和场效应晶体管。 场效应晶体管具有包括漂移区域的半导体本体。 多晶硅层形成在半导体本体的上方或之上，其中多晶硅层的平均粒径在10nm至5μm的范围内，并且包括源极区域和体区域。 此外，场效应晶体管包括与体区域栅极结构相邻的层。