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    MULTI-CHIP PACKAGING
    12.
    发明申请
    MULTI-CHIP PACKAGING 有权

    公开(公告)号：US20220157803A1

    公开(公告)日：2022-05-19

    申请号：US17587657

    申请日：2022-01-28

    Applicant: Intel Corporation

    Inventor： Robert L. SANKMAN ,  Sairam AGRAHARAM ,  Shengquan OU ,  Thomas J DE BONIS ,  Todd SPENCER ,  Yang SUN ,  Guotao WANG

    IPC: H01L25/00 ,  H01L23/538 ,  H01L25/18 ,  H01L23/00 ,  H01L21/56

    Abstract: An electronic device may include a first die that may include a first set of die contacts. The electronic device may include a second die that may include a second set of die contacts. The electronic device may include a bridge interconnect that may include a first set of bridge contacts and may include a second set of bridge contacts. The first set of bridge contacts may be directly coupled to the first set of die contacts (e.g., with an interconnecting material, such as solder). The second set of bridge contacts may be directly coupled to the second set of die contacts (e.g., with solder). The bridge interconnect may help facilitate electrical communication between the first die and the second die.

    METAL-FREE FRAME DESIGN FOR SILICON BRIDGES FOR SEMICONDUCTOR PACKAGES
    13.
    发明申请
    METAL-FREE FRAME DESIGN FOR SILICON BRIDGES FOR SEMICONDUCTOR PACKAGES 有权

    公开(公告)号：US20250070056A1

    公开(公告)日：2025-02-27

    申请号：US18945109

    申请日：2024-11-12

    Applicant: Intel Corporation

    Inventor： Dae-Woo KIM ,  Sujit SHARAN ,  Sairam AGRAHARAM

    IPC: H01L23/58 ,  G01R31/27 ,  H01L21/66 ,  H01L23/00 ,  H01L23/14 ,  H01L23/498 ,  H01L23/522 ,  H01L23/538 ,  H01L23/544 ,  H01L25/065 ,  H01L25/18 ,  H10B80/00

    Abstract: Metal-free frame designs for silicon bridges for semiconductor packages and the resulting silicon bridges and semiconductor packages are described. In an example, a semiconductor structure includes a substrate having an insulating layer disposed thereon, the substrate having a perimeter. A metallization structure is disposed on the insulating layer, the metallization structure including conductive routing disposed in a dielectric material stack. A first metal guard ring is disposed in the dielectric material stack and surrounds the conductive routing. A second metal guard ring is disposed in the dielectric material stack and surrounds the first metal guard ring. A metal-free region of the dielectric material stack surrounds the second metal guard ring. The metal-free region is disposed adjacent to the second metal guard ring and adjacent to the perimeter of the substrate.

    OPEN CAVITY BRIDGE CO-PLANAR PLACEMENT ARCHITECTURES AND PROCESSES
    14.
    发明申请
    OPEN CAVITY BRIDGE CO-PLANAR PLACEMENT ARCHITECTURES AND PROCESSES 有权

    公开(公告)号：US20210305132A1

    公开(公告)日：2021-09-30

    申请号：US16828405

    申请日：2020-03-24

    Applicant: Intel Corporation

    Inventor： Omkar KARHADE ,  Digvijay RAORANE ,  Sairam AGRAHARAM ,  Nitin DESHPANDE ,  Mitul MODI ,  Manish DUBEY ,  Edvin CETEGEN

    IPC: H01L23/482 ,  H01L23/538 ,  H01L23/495

    Abstract: Embodiments disclosed herein include multi-die packages with open cavity bridges. In an example, an electronic apparatus includes a package substrate having alternating metallization layers and dielectric layers. The package substrate includes a first plurality of substrate pads and a second plurality of substrate pads. The package substrate also includes an open cavity between the first plurality of substrate pads and the second plurality of substrate pads, the open cavity having a bottom and sides. The electronic apparatus also includes a bridge die in the open cavity, the bridge die including a first plurality of bridge pads, a second plurality of bridge pads, and conductive traces. An adhesive layer couples the bridge die to the bottom of the open cavity. A gap is laterally between the bridge die and the sides of the open cavity, the gap surrounding the bridge die.

    METAL-FREE FRAME DESIGN FOR SILICON BRIDGES FOR SEMICONDUCTOR PACKAGES
    15.
    发明申请
    METAL-FREE FRAME DESIGN FOR SILICON BRIDGES FOR SEMICONDUCTOR PACKAGES 审中-公开

    公开(公告)号：US20180226364A1

    公开(公告)日：2018-08-09

    申请号：US15749744

    申请日：2015-10-29

    Applicant: Intel Corporation

    Inventor： Dae-Woo KIM ,  Sujit SHARAN ,  Sairam AGRAHARAM

    IPC: H01L23/58 ,  H01L21/66 ,  H01L23/522 ,  H01L23/544 ,  H01L23/498 ,  H01L23/00 ,  G01R31/27

    Abstract: Metal-free frame designs for silicon bridges for semiconductor packages and the resulting silicon bridges and semi-conductor packages are described. In an example, a semiconductor structure includes a substrate having an insulating layer disposed thereon, the substrate having a perimeter. A metallization structure is disposed on the insulating layer, the metallization structure including conductive routing disposed in a dielectric material stack. A first metal guard ring is disposed in the dielectric material stack and surrounds the conductive routing. A second metal guard ring is disposed in the dielectric material stack and surrounds the first metal guard ring. A metal-free region of the dielectric material stack surrounds the second metal guard ring. The metal-free region is disposed adjacent to the second metal guard ring and adjacent to the perimeter of the substrate.

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