公开(公告)号：US07129130B2

公开(公告)日：2006-10-31

申请号：US11298800

申请日：2005-12-09

申请人： James W. Adkisson ,  Gary B. Bronner ,  Dureseti Chidambarrao ,  Ramachandra Divakaruni ,  Carl J. Radens

发明人： James W. Adkisson ,  Gary B. Bronner ,  Dureseti Chidambarrao ,  Ramachandra Divakaruni ,  Carl J. Radens

IPC分类号： H01L21/8242 ,  H01L2/20

CPC分类号： H01L27/10841 ,  H01L27/10864 ,  H01L27/10867

摘要： The present invention provides a vertical memory device formed in a silicon-on-insulator substrate, where a bitline contacting the upper surface of the silicon-on-insulator substrate is electrically connected to the vertical memory device through an upper strap diffusion region formed through a buried oxide layer. The upper strap diffusion region is formed by laterally etching a portion of the buried oxide region to produce a divot, in which doped polysilicon is deposited. The upper strap region diffusion region also provides the source for the vertical transistor of the vertical memory device. The vertical memory device may also be integrated with a support region having logic devices formed atop the silicon-on-insulator substrate.

公开(公告)号：US07009237B2

公开(公告)日：2006-03-07

申请号：US10709450

申请日：2004-05-06

申请人： James W. Adkisson ,  Gary B. Bronner ,  Dureseti Chidambarrao ,  Ramachandra Divakaruni ,  Carl J. Radens

发明人： James W. Adkisson ,  Gary B. Bronner ,  Dureseti Chidambarrao ,  Ramachandra Divakaruni ,  Carl J. Radens

IPC分类号： H01L27/108

CPC分类号： H01L27/10841 ,  H01L27/10864 ,  H01L27/10867

摘要： The present invention provides a vertical memory device formed in a silicon-on-insulator substrate, where a bitline contacting the upper surface of the silicon-on-insulator substrate is electrically connected to the vertical memory device through an upper strap diffusion region formed through a buried oxide layer. The upper strap diffusion region is formed by laterally etching a portion of the buried oxide region to produce a divot, in which doped polysilicon is deposited. The upper strap region diffusion region also provides the source for the vertical transistor of the vertical memory device. The vertical memory device may also be integrated with a support region having logic devices formed atop the silicon-on-insulator substrate.

摘要翻译： 本发明提供了一种形成在绝缘体上硅衬底上的垂直存储器件，其中接触绝缘体上硅衬底的上表面的位线通过上带扩散区域电连接到垂直存储器件 掩埋氧化层。 上带扩散区域通过横向蚀刻掩埋氧化物区域的一部分而形成，其中沉积掺杂多晶硅。 上带区域扩散区域还为垂直存储器件的垂直晶体管提供源极。 垂直存储器件还可以与具有形成在绝缘体上硅衬底上的逻辑器件的支撑区域集成。

公开(公告)号：US06350653B1

公开(公告)日：2002-02-26

申请号：US09689096

申请日：2000-10-12

申请人： James W. Adkisson ,  Ramachandra Divakaruni ,  Jeffrey P. Gambino ,  Jack A. Mandelman

发明人： James W. Adkisson ,  Ramachandra Divakaruni ,  Jeffrey P. Gambino ,  Jack A. Mandelman

IPC分类号： H01L21336

CPC分类号： H01L27/10864 ,  H01L21/84 ,  H01L27/1087 ,  H01L27/1203 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device is presented which is directed to a method of forming embedded DRAM and logic devices, where the DRAM devices are formed in bulk, single crystalline semiconductor regions and logic devices are formed in silicon-on-insulator (“SOI”) regions and where buried, doped glass is used as a mask to form deep trenches for storage in the bulk region. The resulting structure is also disclosed.

摘要翻译： 提出了一种半导体器件，其涉及一种形成嵌入式DRAM和逻辑器件的方法，其中DRAM器件以块状形成，单晶半导体区域和逻辑器件形成在绝缘体上硅（“SOI”）区域中， 其中掩埋的掺杂玻璃用作掩模以形成用于存储在本体区域中的深沟槽。 还公开了所得到的结构。

公开(公告)号：US20080272399A1

公开(公告)日：2008-11-06

申请号：US12172305

申请日：2008-07-14

申请人： James W. Adkisson ,  Andres Bryant ,  John J. Ellis-Monaghan ,  Mark D. Jaffe ,  Jeffrey B. Johnson ,  Alain Loiseau

发明人： James W. Adkisson ,  Andres Bryant ,  John J. Ellis-Monaghan ,  Mark D. Jaffe ,  Jeffrey B. Johnson ,  Alain Loiseau

IPC分类号： H01L31/00

CPC分类号： H01L27/14603 ,  H01L27/14609 ,  H01L27/14689 ,  H01L31/035281

摘要： The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.

公开(公告)号：US08039875B2

公开(公告)日：2011-10-18

申请号：US11850776

申请日：2007-09-06

申请人： James W. Adkisson ,  Andres Bryant ,  John J. Ellis-Monaghan ,  Mark D Jaffe ,  Jeffrey B. Johnson ,  Alain Loiseau

发明人： James W. Adkisson ,  Andres Bryant ,  John J. Ellis-Monaghan ,  Mark D Jaffe ,  Jeffrey B. Johnson ,  Alain Loiseau

IPC分类号： H01L27/148 ,  H01L31/062

CPC分类号： H01L27/14603 ,  H01L27/14609 ,  H01L27/14689 ,  H01L31/035281 ,  H01L31/1037

摘要： The present invention relates to a design structure for a pixel sensor cell. The pixel sensor cell approximately doubles the available signal for a given quanta of light. A design structure for a pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.

摘要翻译： 本发明涉及一种像素传感器单元的设计结构。 像素传感器单元对于给定的光量大约使可用信号加倍。 具有降低的复杂度的像素传感器单元的设计结构包括形成在基板的表面下面的n型收集阱区域，用于收集电子辐射产生的电子撞击在像素传感器单元上​​，以及p型收集阱区域 用于收集由撞击光子产生的孔的基板的表面。 具有第一输入的电路结构耦合到n型收集阱区域，而第二输入端耦合到p型收集阱区域，其中像素传感器单元的输出信号是信号的差值的大小 的第一输入和第二输入的信号。

公开(公告)号：US07563636B2

公开(公告)日：2009-07-21

申请号：US12172304

申请日：2008-07-14

申请人： James W. Adkisson ,  Andres Bryant ,  John J. Ellis-Monaghan ,  Mark D. Jaffe ,  Jeffrey B. Johnson ,  Alain Loiseau

发明人： James W. Adkisson ,  Andres Bryant ,  John J. Ellis-Monaghan ,  Mark D. Jaffe ,  Jeffrey B. Johnson ,  Alain Loiseau

IPC分类号： H01L21/00

CPC分类号： H01L27/14603 ,  H01L27/14609 ,  H01L27/14689 ,  H01L31/035281

摘要： The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.

摘要翻译： 本发明是像素传感器单元及其制造方法。 像素传感器单元对于给定的光量大约使可用信号加倍。 本发明的器件利用通过在像素传感器单元电路中照射光子而产生的空穴。 具有降低的复杂度的像素传感器单元包括形成在基板的表面下面的n型收集阱区域，用于收集由电子辐射照射在像素传感器单元上​​产生的电子以及形成在基板表面下方的p型收集阱区域 用于收集由撞击光子产生的孔。 具有第一输入的电路结构耦合到n型收集阱区域，而第二输入端耦合到p型收集阱区域，其中像素传感器单元的输出信号是信号的差值的大小 的第一输入和第二输入的信号。

公开(公告)号：US20080296476A1

公开(公告)日：2008-12-04

申请号：US12172306

申请日：2008-07-14

申请人： James W. Adkisson ,  Andres Bryant ,  John J. Ellis-Monaghan ,  Mark D. Jaffe ,  Jeffrey B. Johnson ,  Alain Lolseau

发明人： James W. Adkisson ,  Andres Bryant ,  John J. Ellis-Monaghan ,  Mark D. Jaffe ,  Jeffrey B. Johnson ,  Alain Lolseau

IPC分类号： H01L27/146

CPC分类号： H01L27/14603 ,  H01L27/14609 ,  H01L27/14689 ,  H01L31/035281

摘要： The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.

摘要翻译： 本发明是像素传感器单元及其制造方法。 像素传感器单元对于给定的光量大约使可用信号加倍。 本发明的器件利用通过在像素传感器单元电路中照射光子而产生的空穴。 具有降低的复杂度的像素传感器单元包括形成在基板的表面下面的n型收集阱区域，用于收集由电子辐射照射在像素传感器单元上​​产生的电子以及形成在基板表面下方的p型收集阱区域 用于收集由撞击光子产生的孔。 具有第一输入的电路结构耦合到n型收集阱区域，而第二输入端耦合到p型收集阱区域，其中像素传感器单元的输出信号是信号的差值的大小 的第一输入和第二输入的信号。

公开(公告)号：US20080274578A1

公开(公告)日：2008-11-06

申请号：US12172304

申请日：2008-07-14

申请人： James W. Adkisson ,  Andres Bryant ,  John J. Ellis-Monaghan ,  Mark D. Jaffe ,  Jeffrey B. Johnson ,  Alain Loiseau

发明人： James W. Adkisson ,  Andres Bryant ,  John J. Ellis-Monaghan ,  Mark D. Jaffe ,  Jeffrey B. Johnson ,  Alain Loiseau

IPC分类号： H01L21/00

CPC分类号： H01L27/14603 ,  H01L27/14609 ,  H01L27/14689 ,  H01L31/035281

摘要： The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.

摘要翻译： 本发明是像素传感器单元及其制造方法。 像素传感器单元对于给定的光量大约使可用信号加倍。 本发明的器件利用通过在像素传感器单元电路中照射光子而产生的空穴。 具有降低的复杂度的像素传感器单元包括形成在基板的表面下面的n型收集阱区域，用于收集由电子辐射照射在像素传感器单元上​​产生的电子以及形成在基板表面下方的p型收集阱区域 用于收集由撞击光子产生的孔。 具有第一输入的电路结构耦合到n型收集阱区域，而第二输入端耦合到p型收集阱区域，其中像素传感器单元的输出信号是信号的差值的大小 的第一输入和第二输入的信号。

公开(公告)号：US07439561B2

公开(公告)日：2008-10-21

申请号：US11161535

申请日：2005-08-08

申请人： James W. Adkisson ,  Andres Bryant ,  John J. Ellis-Monaghan ,  Mark D. Jaffe ,  Jeffrey B. Johnson ,  Alain Loiseau

发明人： James W. Adkisson ,  Andres Bryant ,  John J. Ellis-Monaghan ,  Mark D. Jaffe ,  Jeffrey B. Johnson ,  Alain Loiseau

IPC分类号： H01L27/148 ,  H01L31/062

CPC分类号： H01L27/14603 ,  H01L27/14609 ,  H01L27/14689 ,  H01L31/035281

摘要： The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.

摘要翻译： 本发明是像素传感器单元及其制造方法。 像素传感器单元对于给定的光量大约使可用信号加倍。 本发明的器件利用通过在像素传感器单元电路中照射光子而产生的空穴。 具有降低的复杂度的像素传感器单元包括形成在基板的表面下面的n型收集阱区域，用于收集由电子辐射照射在像素传感器单元上​​产生的电子以及形成在基板表面下方的p型收集阱区域 用于收集由撞击光子产生的孔。 具有第一输入的电路结构耦合到n型收集阱区域，而第二输入端耦合到p型收集阱区域，其中像素传感器单元的输出信号是信号的差值的大小 的第一输入和第二输入的信号。

公开(公告)号：US07732841B2

公开(公告)日：2010-06-08

申请号：US12172309

申请日：2008-07-14

申请人： James W. Adkisson ,  Andres Bryant ,  John J. Ellis-Monaghan ,  Mark D. Jaffe ,  Jeffrey B. Johnson ,  Alain Loiseau

发明人： James W. Adkisson ,  Andres Bryant ,  John J. Ellis-Monaghan ,  Mark D. Jaffe ,  Jeffrey B. Johnson ,  Alain Loiseau

IPC分类号： H01L27/148 ,  H01L31/062

CPC分类号： H01L27/14603 ,  H01L27/14609 ,  H01L27/14689 ,  H01L31/035281

摘要： The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.

摘要翻译： 本发明是像素传感器单元及其制造方法。 像素传感器单元对于给定的光量大约使可用信号加倍。 本发明的器件利用通过在像素传感器单元电路中照射光子而产生的空穴。 具有降低的复杂度的像素传感器单元包括形成在基板的表面下面的n型收集阱区域，用于收集由电子辐射照射在像素传感器单元上​​产生的电子以及形成在基板表面下方的p型收集阱区域 用于收集由撞击光子产生的孔。 具有第一输入的电路结构耦合到n型收集阱区域，而第二输入端耦合到p型收集阱区域，其中像素传感器单元的输出信号是信号的差值的大小 的第一输入和第二输入的信号。