公开(公告)号：US12191397B2

公开(公告)日：2025-01-07

申请号：US17522258

申请日：2021-11-09

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Hajime Watakabe ,  Takuo Kaitoh ,  Ryo Onodera

IPC: H01L29/786

Abstract: A semiconductor device includes a thin-film transistor. The thin-film transistor comprises an oxide semiconductor layer, a gate insulating layer, a gate electrode overlapped on the oxide semiconductor layer through the gate insulating layer, a source electrode in contact with the oxide semiconductor layer, a drain electrode in contact with the oxide semiconductor layer and a first metal layer in contact with the oxide semiconductor layer and disposed between the source electrode and the drain electrode at a distance from the source electrode and the drain electrode.

公开(公告)号：US12148840B2

公开(公告)日：2024-11-19

申请号：US17542515

申请日：2021-12-06

Applicant: Japan Display Inc.

Inventor： Kentaro Miura ,  Hajime Watakabe ,  Ryo Onodera

IPC: H01L29/786 ,  H01L29/66

Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes forming a first insulating layer above a polycrystalline silicon semiconductor, forming an oxide semiconductor on the first insulating layer, forming a second insulating layer on the oxide semiconductor, forming contact holes penetrating to the polycrystalline silicon semiconductor in insulating layers including the first insulating layer and the second insulating layer, forming a metal film on the second insulating layer, forming a patterned resist on the metal film, etching the metal film using the resist as a mask, performing ion implantation into the oxide semiconductor without removing the resist, and removing the resist.

公开(公告)号：US11764233B2

公开(公告)日：2023-09-19

申请号：US17459423

申请日：2021-08-27

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Isao Suzumura ,  Akihiro Hanada ,  Yohei Yamaguchi

IPC: H01L27/00 ,  H01L29/00 ,  H01L27/12 ,  H01L29/24 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/1292 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/66757 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78666

Abstract: A display device including a substrate having thin film transistors (TFT) comprising: the TFT including an oxide semiconductor film, a gate electrode and an insulating film formed between the oxide semiconductor film and the gate electrode, wherein a first aluminum oxide film and a second aluminum oxide film, which is formed on the first aluminum oxide film, are formed between the insulating film and the gate electrode, an oxygen concentration in the first aluminum oxide film is bigger than an oxygen concentration in the second aluminum oxide film.

公开(公告)号：US11640088B2

公开(公告)日：2023-05-02

申请号：US17159154

申请日：2021-01-27

Applicant: Japan Display Inc.

Inventor： Ryo Onodera ,  Hajime Watakabe ,  Akihiro Hanada

IPC: G02F1/1362 ,  G02F1/1335 ,  G02F1/1368

Abstract: A high definition display device is provided. The display device includes an array substrate, and an opposing substrate. The array substrate has a substrate, and on the substrate, a first pixel having a first color filter and a second pixel having a second color filter disposed adjacent to the first pixel. Each of the first color filter and the second color filter has a first dielectric layer, a transmissive layer disposed on the first dielectric layer, and a second dielectric layer disposed on the transmissive layer. The transmissive layer of the first color filter has a first film thickness, and the transmissive layer of the second color filter has a second film thickness larger than the first film thickness. On the transmissive layer of the second color filter, a first layer different from the transmissive layer is disposed on a side of the transmissive layer of the first color filter. A height of a bottom face of the first layer is equal to the first film thickness.

公开(公告)号：US10459304B2

公开(公告)日：2019-10-29

申请号：US16395491

申请日：2019-04-26

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Isao Suzumura ,  Hirokazu Watanabe ,  Akihiro Hanada

IPC: H01L29/10 ,  H01L29/12 ,  G02F1/1368 ,  H01L27/12 ,  H01L51/50 ,  H01L29/786 ,  H01L21/8234

Abstract: A display device comprising: a first TFT using silicon (Si) and a second TFT using oxide semiconductor are formed on a substrate, a distance between the silicon (Si) and the substrate is smaller than a distance between the oxide semiconductor and the substrate, a drain source electrode of the first TFT connects with the silicon (Si) via a first through hole, a drain source electrode of the second TFT connects with the oxide semiconductor via a second through hole, metal films are made on the oxide semiconductor sandwiching a channel of the oxide semiconductor in a plan view, the channel has a channel width, an ALO layer is formed on the metal films and the oxide semiconductor, the second source drain electrode and the metal films are connected via the second through hole formed in the AlO layer.

公开(公告)号：US20190312064A1

公开(公告)日：2019-10-10

申请号：US16447000

申请日：2019-06-20

Applicant: Japan Display Inc.

Inventor： Toshinari SASAKI ,  Hajime Watakabe ,  Akihiro Hanada ,  Marina Shiokawa

IPC: H01L27/12 ,  H01L29/786

Abstract: A semiconductor device includes a oxide semiconductor layer, a gate electrode arranged above the oxide semiconductor layer, a gate insulation layer between the oxide semiconductor layer and the gate electrode, a first insulation layer arranged above the oxide semiconductor layer and arranged with a first aperture part, wiring including an aluminum layer arranged above the first insulation layer, the wiring being electrically connected to the oxide semiconductor layer via the first aperture part, a barrier layer including aluminum oxide above the first insulation layer, above the wiring and covering a side surface of the wiring, and an organic insulation layer arranged above the barrier layer.

公开(公告)号：US10211235B2

公开(公告)日：2019-02-19

申请号：US15678501

申请日：2017-08-16

Applicant: Japan Display Inc.

Inventor： Isao Suzumura ,  Hajime Watakabe ,  Akihiro Hanada ,  Hirokazu Watanabe

IPC: H01L27/12 ,  H01L21/02 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786 ,  G03F7/00 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1368 ,  H01L27/32

Abstract: The purpose of the present invention is to form both LTPS TFT and Ply-Si TFT on a same substrate. The feature of the display device to realize the above purpose is that: a display device comprising: a substrate including a first TFT having an oxide semiconductor layer and a second TFT having a Poly-Si layer, an undercoat is formed on the substrate, the oxide semiconductor layer is formed on or above the undercoat, a first interlayer insulating film is formed on or above the oxide semiconductor layer, the Poly-Si layer is formed on or above the first interlayer insulating film.

公开(公告)号：US10115740B2

公开(公告)日：2018-10-30

申请号：US15405511

申请日：2017-01-13

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Hajime Watakabe ,  Kazufumi Watabe

IPC: H01L29/12 ,  H01L29/40 ,  H01L23/48 ,  H01L27/12 ,  H01L29/423 ,  H01L29/51 ,  H01L29/786

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first semiconductor layer formed of silicon and positioned above the insulating substrate, a second semiconductor layer formed of a metal oxide and positioned above the first semiconductor layer, a first insulating film formed of a silicon nitride and positioned between the first semiconductor layer and the second semiconductor layer, and a block layer positioned between the first semiconductor film and the second semiconductor layer, the block layer hydrogen diffusion of which is lower than that of the first insulating film.

公开(公告)号：US09412334B2

公开(公告)日：2016-08-09

申请号：US14633997

申请日：2015-02-27

Applicant: JAPAN DISPLAY INC.

Inventor： Hajime Watakabe ,  Arichika Ishida ,  Masato Hiramatsu

IPC: G02F1/1335 ,  G09G5/02 ,  G02F1/1362 ,  G09G3/36

CPC classification number: G09G5/02 ,  G02F1/133514 ,  G02F1/136209 ,  G02F2001/133521 ,  G02F2001/136222 ,  G02F2201/346 ,  G02F2202/104 ,  G09G3/3607

Abstract: According to one embodiment, a liquid crystal display device includes an array substrate including a first color filter configured to transmit light in a first wavelength range, a second color filter configured to transmit light in a second wavelength range of greater wavelengths than the first wavelength range, a first switching element disposed above the second color filter, a second switching element disposed above the second color filter, a first pixel electrode which is electrically connected to the first switching element and is located above the first color filter, and a second pixel electrode which is electrically connected to the second switching element and is located above the second color filter.

公开(公告)号：US20160149047A1

公开(公告)日：2016-05-26

申请号：US14944711

申请日：2015-11-18

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Arichika Ishida ,  Takashi Okada ,  Masayoshi Fuchi ,  Akihiro Hanada

IPC: H01L29/786 ,  H01L23/00 ,  H01L21/385 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78606

Abstract: According to one embodiment, a thin-film transistor and a method of manufacturing the same achieve size reduction of the thin-film transistor while using an oxide semiconductor layer. The oxide semiconductor layer includes a channel region, a source region, and a drain region. A gate electrode is arranged at a position spaced from the channel region of the oxide semiconductor layer so as to face the channel region. A source electrode is electrically connected to the source region of the oxide semiconductor layer. A drain electrode is electrically connected to the drain region of the oxide semiconductor layer. An undercoat layer adjoins the source region and the drain region of the oxide semiconductor layer. A hydrogen blocking layer has a hydrogen concentration lower than that in the undercoat layer and separates the undercoat layer and the channel region of the oxide semiconductor layer.

Abstract translation: 根据一个实施例，薄膜晶体管及其制造方法在使用氧化物半导体层时实现薄膜晶体管的尺寸减小。 氧化物半导体层包括沟道区，源极区和漏极区。 栅电极配置在与氧化物半导体层的沟道区隔开的位置，以面对沟道区。 源极电极与氧化物半导体层的源极区电连接。 漏电极与氧化物半导体层的漏区电连接。 底涂层邻接氧化物半导体层的源极区和漏极区。 氢阻挡层的氢浓度低于底涂层中的氢浓度，并分离底涂层和氧化物半导体层的沟道区。