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55 条记录 (耗时 0.036 秒)

    Capacitor design for controlling equivalent series resistance
    12.
    发明授权
    Capacitor design for controlling equivalent series resistance 有权
    用于控制等效串联电阻的电容器设计

    公开(公告)号：US07212395B2

    公开(公告)日：2007-05-01

    申请号：US11024060

    申请日：2004-12-28

    申请人： Yuan-Liang Li ,  David G. Figueroa ,  Farzaneh Yahyaei-moayyed ,  Dong Zhong

    发明人： Yuan-Liang Li ,  David G. Figueroa ,  Farzaneh Yahyaei-moayyed ,  Dong Zhong

    IPC分类号： H01G4/228

    CPC分类号： H01G4/012 ,  H01G4/232 ,  H01G4/30 ,  H01L2224/16 ,  H01L2924/15312 ,  H01L2924/19103 ,  H01L2924/19106 ,  H05K1/0231

    摘要： According to some embodiments, a capacitor includes a first external capacitor plane including a first at least one terminal of a first polarity, and a first internal capacitor plane including a second at least one terminal of the first polarity. The second at least one terminal of the first polarity may be electrically coupled to the first at least one terminal of the first polarity, and a total area of the second at least one terminal of the first polarity may be less than a total area of the first at least one terminal of the first polarity.

    摘要翻译： 根据一些实施例，电容器包括包括第一极性的第一至少一个端子的第一外部电容器平面和包括第一极性的第二至少一个端子的第一内部电容器平面。 第一极性的第二至少一个端子可以电耦合到第一极性的第一至少一个端子，并且第一极性的第二至少一个端子的总面积可以小于第一极性的总面积 第一极性的至少一个端子。

    Inductive filters and methods of fabrication therefor
    14.
    发明授权
    Inductive filters and methods of fabrication therefor 有权
    电感式滤波器及其制造方法

    公开(公告)号：US07518248B2

    公开(公告)日：2009-04-14

    申请号：US11462611

    申请日：2006-08-04

    申请人： Yuan-Liang Li ,  David G. Figueroa

    发明人： Yuan-Liang Li ,  David G. Figueroa

    IPC分类号： H01L23/52

    CPC分类号： H01F17/0033 ,  H01F41/041 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15312 ,  H05K1/115 ,  H05K1/165 ,  H05K3/06 ,  H05K3/42 ,  H05K2201/086 ,  H05K2201/097 ,  H05K2201/1006 ,  H05K2203/0723 ,  H01L2224/0401

    摘要： A series of plated through hole (PTH) vias are interconnected by traces that alternate between a top surface and a bottom surface of a dielectric board. The PTH vias in the series can be positioned to create a collinear inductive filter, a coil-type inductive filter, or a transformer. Multiple, electrically isolated series of interconnected PTH vias can be used as a multi-phase inductive filter in one embodiment. In another embodiment, multiple series of interconnected PTH vias are electrically connected by a linking portion of conductive material, resulting in a low-resistance inductive filter. Ferromagnetic material patterns can be embedded in the dielectric board to enhance the inductive characteristics of the interconnected via structures. In one embodiment, a closed-end pattern is provided with two series of interconnected vias coiling around the pattern, resulting in an embedded transformer structure. A method of producing an interconnected series of PTH vias includes providing a dielectric board having a series of holes. In some embodiments, the board includes an embedded ferromagnetic material pattern. The holes and the top and bottom surface of the dielectric board have a conductive material thereupon. Portions of the conductive material are selectively removed, resulting in the embedded inductive filter and/or transformer structure.

    摘要翻译： 一系列电镀通孔（PTH）通孔在电介质板的顶表面和底表面之间交替的迹线互连。 该系列中的PTH通孔可以定位成产生共线感应滤波器，线圈型感应滤波器或变压器。 在一个实施例中，多个电隔离的互连PTH通孔系列可用作多相感应滤波器。 在另一个实施例中，多个互连的PTH通孔系列通过导电材料的连接部分电连接，导致低电阻感应滤波器。 铁磁材料图案可以嵌入电介质板中以增强互连通孔结构的感应特性。 在一个实施例中，闭合端图案具有围绕图案卷绕的两系列互连的通孔，从而形成嵌入式变压器结构。 制造互连的PTH通孔系列的方法包括提供具有一系列孔的电介质板。 在一些实施例中，板包括嵌入的铁磁材料图案。 电介质板的孔和顶表面和底表面之间具有导电材料。 选择性地去除导电材料的部分，从而产生嵌入的感应滤波器和/或变压器结构。

    Capacitors having separate terminals on three or more sides
    15.
    发明授权
    Capacitors having separate terminals on three or more sides 失效
    电容器在三面或三面以上具有独立的端子

    公开(公告)号：US07176565B2

    公开(公告)日：2007-02-13

    申请号：US10006188

    申请日：2001-12-03

    申请人： Yuan-Liang Li ,  David G. Figueroa ,  Chee-Yee Chung

    发明人： Yuan-Liang Li ,  David G. Figueroa ,  Chee-Yee Chung

    IPC分类号： H01L23/34

    CPC分类号： H01G4/232

    摘要： A multilayer capacitor comprises separate terminals on at least three sides, and on as many as six sides. The capacitor can be fabricated in a large number of different configurations, types, and sizes, depending upon the target application. The separate terminals that are disposed on different sides of the capacitor can be readily coupled to a variety of different adjacent conductors, such as die terminals (including bumpless terminals or bars), IC package terminals (including pads or bars), and the terminals of adjacent discrete components. Methods of fabrication, as well as application of the capacitor to an electronic assembly, are also described.

    摘要翻译： 多层电容器包括在至少三个侧面上以及多达六个侧面的分开的端子。 根据目标应用，电容器可以以大量不同的配置，类型和尺寸制造。 设置在电容器的不同侧上的单独的端子可以容易地耦合到各种不同的相邻导体，例如模具端子（包括无扰动端子或条），IC封装端子（包括焊盘或条），以及端子 相邻的分立元件。 还描述了制造方法以及将电容器应用于电子组件。

    Integrated circuit socket with capacitors and shunts
    16.
    发明授权
    Integrated circuit socket with capacitors and shunts 失效
    集成电路插座，带电容器和分流器

    公开(公告)号：US06811410B2

    公开(公告)日：2004-11-02

    申请号：US10156909

    申请日：2002-05-28

    申请人： David G. Figueroa ,  Yuan-Liang Li

    发明人： David G. Figueroa ,  Yuan-Liang Li

    IPC分类号： H01R1200

    CPC分类号： H05K1/0231 ,  H01R12/7088 ,  H01R13/6625 ,  H01R31/08 ,  H01R33/765 ,  H05K2201/10325 ,  H05K2201/10689

    摘要： An integrated circuit socket with capacitors and shunts is disclosed. According to one embodiment of the invention, a socket is divided into a shunt area, a socket pin area, and a land side capacitor area. The shunt area may contain a variable number of power shunts, ground shunts, and capacitors. The capacitors are connected across, and serve to decouple, power shunts and ground shunts. The shunts are to supply an electrical current from the capacitors to an integrated circuit device. The socket pin area may be surrounded by a metal fence serving as to lessen electromagnetic interference and as a ground and/or signal reference. The fence may be divided into sub-areas each comprising a coaxial differential signal pin opening pair. In alternate designs, an elongated power bar may serve as a power or ground shunt and may be used with several capacitors.

    摘要翻译： 公开了一种具有电容器和分流器的集成电路插座。 根据本发明的一个实施例，插座被分成分流区域，插座引脚区域和陆侧电容器区域。 分流区域可能包含可变数量的功率分流器，接地分流器和电容器。 电容器连接在一起，并用于去耦电源分流器和接地分流器。 分流器将从电容器向集成电路器件提供电流。 插座针脚区域可以被金属围栏包围，以减少电磁干扰，并且作为接地和/或信号参考。 栅栏可以被划分成各自包括同轴差分信号针开口对的子区域。 在替代设计中，细长的电源杆可以用作电源或接地分流器，并且可以与多个电容器一起使用。

    Embedded enclosure for effective electromagnetic radiation reduction
    17.
    发明授权
    Embedded enclosure for effective electromagnetic radiation reduction 有权
    嵌入式外壳，有效减少电磁辐射

    公开(公告)号：US06559484B1

    公开(公告)日：2003-05-06

    申请号：US09672619

    申请日：2000-09-29

    申请人： Yuan-Liang Li ,  Chee-Yee Chung ,  David G. Figueroa

    发明人： Yuan-Liang Li ,  Chee-Yee Chung ,  David G. Figueroa

    IPC分类号： H01L2710

    CPC分类号： H01L23/49822 ,  H01L23/49838 ,  H01L23/50 ,  H01L2224/16 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2224/17181 ,  H01L2924/01019 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/19104 ,  H01L2924/19106 ,  H01L2924/3025

    摘要： In one embodiment of the invention, an embedded enclosure includes a power plane and first and second ground planes. The power plane has a power surface and a power periphery, and couples power to signals of an integrated circuit operating at a fundamental frequency. The first and second ground planes have first and second ground surfaces and first and second ground peripheries, respectively. The first and second ground planes couple ground to the signals. The first and second ground planes are separated from the power plane by first and second distances, respectively. The first and second ground surfaces are larger than the power surface. The first and second ground peripheries extend at least third and fourth distances from the power periphery, respectively. The third and fourth distances are N and M times larger than the first and second distances, respectively.

    摘要翻译： 在本发明的一个实施例中，嵌入式外壳包括电源平面以及第一和第二接地平面。 电力平面具有功率表面和功率外围，并且将功率耦合到以基频工作的集成电路的信号。 第一和第二接地平面分别具有第一和第二接地表面以及第一和第二接地外围。 第一和第二接地平面将信号耦合到地面。 第一和第二接地平面分别与动力平面分开第一和第二距离。 第一和第二接地表面大于功率表面。 第一和第二接地周边分别从功率周边延伸至少第三和第四距离。 第三和第四距离分别比第一和第二距离大N和M倍。

    Integral capacitor using embedded enclosure for effective electromagnetic radiation reduction
    19.
    发明授权
    Integral capacitor using embedded enclosure for effective electromagnetic radiation reduction 有权
    集成电容器采用嵌入式外壳，有效减少电磁辐射

    公开(公告)号：US06509640B1

    公开(公告)日：2003-01-21

    申请号：US09675789

    申请日：2000-09-29

    申请人： Yuan-Liang Li ,  Chee-Yee Chung ,  David G. Figueroa

    发明人： Yuan-Liang Li ,  Chee-Yee Chung ,  David G. Figueroa

    IPC分类号： H01L2348

    CPC分类号： H01L23/49822 ,  H01L23/49838 ,  H01L23/5383 ,  H01L23/552 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/19104 ,  H01L2924/19106 ,  H01L2924/3025 ,  Y10S257/916 ,  H01L2224/0401

    摘要： In one embodiment of the invention, an integral capacitor includes a power plane, a ground plane, and a dielectric layer. The power plane has a power surface and a power periphery. The power plane couples power to signals of an integrated circuit operating at a fundamental frequency. The first ground plane have a first ground surface and a first ground periphery. The first ground plane couples ground to the signals. The first ground plane is separated from the power plane by a first distance. The first ground surface is larger than the power surface and the first ground periphery extends at least a second distance from the power periphery. The second distance is at least larger than N times the first distance. The dielectric layer is formed between the power plane and the first ground plane.

    摘要翻译： 在本发明的一个实施例中，整体电容器包括电源平面，接地平面和电介质层。 动力平面具有动力面和动力周边。 电力平面将功率耦合到以基频工作的集成电路的信号。 第一接地平面具有第一接地表面和第一接地边缘。 第一个接地平面将信号耦合到地面。 第一接地平面与动力平面分开第一距离。 第一接地表面大于功率表面，并且第一接地周边从功率周边延伸至少第二距离。 第二距离至少大于第一距离的N倍。 电介质层形成在电源平面和第一接地平面之间。