公开(公告)号：US20240276640A1

公开(公告)日：2024-08-15

申请号：US18386053

申请日：2023-11-01

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Young-Gon Kim ,  Hokwon Yoon ,  Eunseok Kang

IPC: H05K1/11 ,  H05K1/02 ,  H05K3/40

CPC classification number: H05K1/111 ,  H05K1/0254 ,  H05K3/4015 ,  H05K2201/0203 ,  H05K2201/099

Abstract: An electronic component package according to an embodiment includes a circuit board including an insulating layer, a circuit wiring disposed inside the insulating layer, a plurality of first conductive pads disposed in a first region on the insulating layer and connected to the circuit wiring, an auxiliary pad disposed over the first conductive pad and having a diameter smaller than that of the first conductive pad, and a solder resist layer disposed over the insulating layer, having a first opening overlapping the first region, and spaced apart from the auxiliary pad; an electronic component spaced apart from the solder resist layer and disposed over the first opening; and a conductive adhesive member electrically connecting the auxiliary pad and the electronic component.

公开(公告)号：US20190199232A1

公开(公告)日：2019-06-27

申请号：US16289758

申请日：2019-03-01

Applicant: Delta Electronics (Shanghai) CO., LTD

Inventor： Jianhong ZENG ,  Xiaoni XIN

IPC: H02M7/00 ,  H02M3/335 ,  H05K1/11 ,  H05K7/06 ,  H05K7/02 ,  H05K1/18 ,  H05K1/14 ,  H01F27/40 ,  H05K1/02 ,  H01F27/24 ,  H05K1/16 ,  H01F27/28 ,  H02M7/04

CPC classification number: H02M7/003 ,  H01F27/24 ,  H01F27/28 ,  H01F27/2804 ,  H01F27/306 ,  H01F27/40 ,  H01F2027/408 ,  H02M3/33576 ,  H02M7/04 ,  H02M2001/0048 ,  H05K1/0203 ,  H05K1/0254 ,  H05K1/111 ,  H05K1/115 ,  H05K1/142 ,  H05K1/145 ,  H05K1/165 ,  H05K1/181 ,  H05K1/182 ,  H05K7/026 ,  H05K7/06 ,  H05K2201/086 ,  H05K2201/10015 ,  H05K2201/1003 ,  H05K2201/10166 ,  H05K2201/10174 ,  Y02B70/1491

Abstract: A converter module includes: a system board; and an isolated rectifier unit connected with the system board via at least one pin, the isolated rectifier unit including: a system board; a circuit module; and an isolated rectifier unit arranged adjacent to the circuit module and connected with the system board; wherein the isolated rectifier unit includes: a magnetic core comprising at least one core column parallel to the system board and two cover plates provided at both ends of the core column; and multiple carrier board units provided between the two cover plates and perpendicular to the system board, wherein each of the carrier board units comprises at least one via hole, at least one primary winding, at least one secondary winding and at least one switch connected with the at least one secondary winding.

公开(公告)号：US09967970B2

公开(公告)日：2018-05-08

申请号：US15525237

申请日：2016-10-19

Applicant: SIEMENS HEALTHCARE GMBH

Inventor： Walter Beyerlein ,  Richard Eichhorn ,  Christian Hoffmann ,  Norbert Hoffmann ,  Rashid Karimi

IPC: H05K1/02 ,  H05G1/12 ,  H05K1/18 ,  H05K1/11

CPC classification number: H05K1/0254 ,  H02M7/003 ,  H05G1/10 ,  H05G1/12 ,  H05K1/111 ,  H05K1/181 ,  H05K2201/1003

Abstract: The disclosure specifies a circuit arrangement having electronic first components arranged on a circuit board and lying at high-voltage potential. The circuit arrangement includes functionless, electronic second components lying at high-voltage potential, which are arranged on the circuit board adjacent to the electronic first components, and configured to reduce the maximum electrical field strength between the first components and a reference potential and/or between pads of the circuit board and the reference potential. Through the additional, functionless components, the maximum electrical field strength between electronic components at high voltage and at a reference potential will be reduced. The disclosure also specifies a high voltage generation unit and an x-ray generator.

公开(公告)号：US09964326B2

公开(公告)日：2018-05-08

申请号：US14214335

申请日：2014-03-14

Applicant: Honeywell International Inc.

Inventor： Tarik Khoury ,  Steven J. McPherson ,  Petr Adamik ,  Jiri Sapak

IPC: F24F11/00 ,  H02H9/04 ,  H05F3/00 ,  H05K1/02 ,  H05K3/32 ,  G05D23/32 ,  G01K7/42 ,  H05K1/11 ,  H01R4/34 ,  H05K7/14 ,  H02H9/00 ,  H05K5/00 ,  H05K13/00 ,  G02F1/1333 ,  H05K9/00 ,  H02G3/14 ,  G05D23/19

CPC classification number: F24F11/30 ,  F24F11/52 ,  G01K7/42 ,  G02F1/133308 ,  G02F2001/133314 ,  G05D23/1904 ,  G05D23/32 ,  H01R4/34 ,  H02G3/10 ,  H02G3/14 ,  H02H9/005 ,  H02H9/04 ,  H05F3/00 ,  H05K1/0254 ,  H05K1/111 ,  H05K3/32 ,  H05K5/0017 ,  H05K7/1422 ,  H05K7/1427 ,  H05K9/0037 ,  H05K9/0054 ,  H05K13/00 ,  H05K13/0015 ,  Y10T29/49002 ,  Y10T29/49124 ,  Y10T29/4913 ,  Y10T29/49826

Abstract: An illustrative electronic assembly having an electrical connector therein to ground an electronic component of the electronic assembly to a grounding feature of a printed wiring assembly (PWA) of the electronic assembly. The electronic assembly may include a housing, the PWA, the electronic component and the electrical connector. The electrical connector may be a conductive and resilient extender or connector that may have a first portion connected to the PWA and a second portion extending generally away from the PWA toward the electronic component. The second portion of the electrical connector may be in mechanical and electrical contact with the electronic component.

公开(公告)号：US09851120B2

公开(公告)日：2017-12-26

申请号：US14214435

申请日：2014-03-14

Applicant: Honeywell International Inc.

Inventor： Jiri Sapak ,  David Mulhouse ,  Vaclav Novak ,  Mohammad Aljabari ,  Daniel Eppinger ,  Tracy Lentz

IPC: H01H1/00 ,  F24F11/00 ,  G05D23/32 ,  G01K7/42 ,  H05K1/11 ,  H01R4/34 ,  H05K3/32 ,  H05K7/14 ,  H02H9/04 ,  H02H9/00 ,  H05K5/00 ,  H05K13/00 ,  G02F1/1333 ,  H05K9/00 ,  H02G3/14 ,  G05D23/19

CPC classification number: F24F11/30 ,  F24F11/52 ,  G01K7/42 ,  G02F1/133308 ,  G02F2001/133314 ,  G05D23/1904 ,  G05D23/32 ,  H01R4/34 ,  H02G3/10 ,  H02G3/14 ,  H02H9/005 ,  H02H9/04 ,  H05F3/00 ,  H05K1/0254 ,  H05K1/111 ,  H05K3/32 ,  H05K5/0017 ,  H05K7/1422 ,  H05K7/1427 ,  H05K9/0037 ,  H05K9/0054 ,  H05K13/00 ,  H05K13/0015 ,  Y10T29/49002 ,  Y10T29/49124 ,  Y10T29/4913 ,  Y10T29/49826

Abstract: A surge protection circuit for an electronic device such as an HVAC controller. In one example, the surge protection circuit may include a first voltage clamp, a second voltage clamp, a resistor, and an output port. The first voltage clamp may provide a first clamping voltage between a power input terminal and a common terminal. The second voltage clamp may provide a second clamping voltage that is less than the first clamping voltage. The resistor may be connected in series with the second voltage clamp, and the series connected resistor and second voltage clamp may be connected in parallel with the first voltage clamp. As such, a surge current at the power input terminal may be split between the first voltage clamp and the second voltage clamp. The amount of surge current that is provided to the second voltage clamp may be set by the value of the resistor.

公开(公告)号：US20170325327A1

公开(公告)日：2017-11-09

申请号：US15472704

申请日：2017-03-29

Applicant: Massachusetts Institute of Technology ,  Hughes Circuits Inc.

Inventor： James P. Smith ,  M. David Conway ,  David Bragdon ,  David B. Du Russel ,  Thomas Ferguson ,  Jeffrey M. Hughes

IPC: H05K1/02

CPC classification number: H05K1/0206 ,  H05K1/021 ,  H05K1/0237 ,  H05K1/0254 ,  H05K1/0263 ,  H05K1/0272 ,  H05K1/0284 ,  H05K3/445 ,  H05K2201/064

Abstract: A printed circuit board for high-power components includes at least two dielectric layers. A thermally-conductive embedded layer is disposed between two of the dielectric layers and includes one or more internal coolant channels. Thermal vias extend from the embedded layer to an exterior surface of at least one of the dielectric layers. At least one of the dielectric layers in the printed circuit board has an exterior surface on which one or more high power components may be mounted. In some implementations, there are at least two dielectric layers on a same side of the embedded layer and high power components may be located inside the printed circuit board between two dielectric layers. Thermal resistance between the high-power components and the embedded layer is decreased in comparison to typical surface-mounted cold plates, resulting in more efficient heat dissipation. In some implementations the embedded layer is also an electrical ground plane.

公开(公告)号：US09803882B2

公开(公告)日：2017-10-31

申请号：US14214462

申请日：2014-03-14

Applicant: Honeywell International Inc.

Inventor： Tarik Khoury ,  Petr Adamik ,  Tracy Lentz ,  Steven J. Mcpherson ,  Mohammad Aljabari ,  Arnie Kalla

IPC: H05K3/30 ,  F24F11/00 ,  G05D23/32 ,  G01K7/42 ,  H05K1/11 ,  H01R4/34 ,  H05K3/32 ,  H05K7/14 ,  H02H9/04 ,  H02H9/00 ,  H05K5/00 ,  H05K13/00 ,  G02F1/1333 ,  H05K9/00 ,  H02G3/14 ,  G05D23/19

CPC classification number: F24F11/30 ,  F24F11/52 ,  G01K7/42 ,  G02F1/133308 ,  G02F2001/133314 ,  G05D23/1904 ,  G05D23/32 ,  H01R4/34 ,  H02G3/10 ,  H02G3/14 ,  H02H9/005 ,  H02H9/04 ,  H05F3/00 ,  H05K1/0254 ,  H05K1/111 ,  H05K3/32 ,  H05K5/0017 ,  H05K7/1422 ,  H05K7/1427 ,  H05K9/0037 ,  H05K9/0054 ,  H05K13/00 ,  H05K13/0015 ,  Y10T29/49002 ,  Y10T29/49124 ,  Y10T29/4913 ,  Y10T29/49826

Abstract: An electronic device may include a housing and a printed circuit board, where the housing has a front cover and a back cover that at least substantially enclose the printed circuit board. In some instances, the back cover may include an outer shell and one or more inward extending walls that extend inwardly toward the printed circuit board. In some cases, the inward extending walls, the outer shell, and the printed circuit board define two or more internal pockets within the housing. The pockets may, in some cases, separate one region of the printed circuit board from another region of the printed circuit board. In some instances, the one or more inward extending walls may be configured to provide support to a back side of the printed circuit board, which may be particularly useful when a touch screen display is mounted on a front side of the printed circuit board.

公开(公告)号：US09797619B2

公开(公告)日：2017-10-24

申请号：US14214446

申请日：2014-03-14

Applicant: Honeywell International Inc.

Inventor： Mohammad Aljabari ,  Michael Lunacek

IPC: F24F11/00 ,  G01K7/42 ,  G05D23/32 ,  H05K1/11 ,  H01R4/34 ,  H05K3/32 ,  H05K7/14 ,  H02H9/04 ,  H02H9/00 ,  H05K5/00 ,  H05K13/00 ,  G02F1/1333 ,  H05K9/00 ,  H02G3/14 ,  G05D23/19

CPC classification number: F24F11/30 ,  F24F11/52 ,  G01K7/42 ,  G02F1/133308 ,  G02F2001/133314 ,  G05D23/1904 ,  G05D23/32 ,  H01R4/34 ,  H02G3/10 ,  H02G3/14 ,  H02H9/005 ,  H02H9/04 ,  H05F3/00 ,  H05K1/0254 ,  H05K1/111 ,  H05K3/32 ,  H05K5/0017 ,  H05K7/1422 ,  H05K7/1427 ,  H05K9/0037 ,  H05K9/0054 ,  H05K13/00 ,  H05K13/0015 ,  Y10T29/49002 ,  Y10T29/49124 ,  Y10T29/4913 ,  Y10T29/49826

Abstract: Systems and methods herein include features for compensating a temperature reading of a thermostat. The thermostat may include a housing and one or more temperature sensors within the housing. The thermostat may sense a temperature using one or more of the temperature sensors. A processor and/or memory of the thermostat may be capable of and/or configured to compensate the sensed temperature with a first temperature compensation model and compensate the sensed temperature with a second temperature compensation model. During compensation of the sensed temperature, the system may transition from compensating the sensed temperature with the first temperature compensation model to compensating the sensed temperature with the second temperature compensation model over time and independent of the sensed temperature.

公开(公告)号：US20170213636A1

公开(公告)日：2017-07-27

申请号：US15483679

申请日：2017-04-10

Applicant: General Electric Company

Inventor： Alan Carroll Lovell ,  Mark Eugene Shepard ,  Andrew David McArthur ,  Qin Chen ,  Todd David Greenleaf

IPC: H01F27/28 ,  H05K1/16 ,  H01F41/02 ,  H05K3/46 ,  H01F27/24 ,  H01F41/04 ,  H05K1/02 ,  H05K1/14

CPC classification number: H01F27/2885 ,  H01F17/0013 ,  H01F27/24 ,  H01F27/2804 ,  H01F41/0206 ,  H01F41/043 ,  H01F41/32 ,  H01F2017/008 ,  H01F2027/2809 ,  H01F2027/2819 ,  H05K1/0224 ,  H05K1/0254 ,  H05K1/0256 ,  H05K1/144 ,  H05K1/165 ,  H05K3/46 ,  H05K2201/0715 ,  H05K2201/09672 ,  H05K2201/098 ,  Y10T29/4902 ,  Y10T29/49073

Abstract: A device includes a printed circuit board (PCB). The device may also include a high voltage coil disposed on the PCB and a low voltage coil disposed on the PCB. Further, a conductive shield forms a three-dimensional enclosure around the high voltage coil and confines an electric field generated by the device to the PCB.

公开(公告)号：US09508485B1

公开(公告)日：2016-11-29

申请号：US14596836

申请日：2015-01-14

Applicant: VLT, Inc.

Inventor： Patrizio Vinciarelli

IPC: H04L25/02 ,  H05K1/14 ,  H01F27/28 ,  H01F27/36 ,  H01F7/20 ,  H05K1/11 ,  H05K1/02 ,  H02J5/00 ,  H01F7/06 ,  H05K1/16

CPC classification number: H01F27/2804 ,  H01F27/288 ,  H01F2019/085 ,  H01F2027/2809 ,  H04L25/0266 ,  H05K1/0239 ,  H05K1/0254 ,  H05K1/0298 ,  H05K1/145 ,  H05K1/165 ,  H05K3/366 ,  H05K2201/09063 ,  H05K2201/10189

Abstract: A signal isolator apparatus includes a first substrate for supporting input circuitry including a high frequency oscillator circuit for receiving an input signal, a second substrate for supporting output circuitry including a detector circuit for providing an output signal; and a third substrate having parallel conductive layers separated by insulation. The third substrate has an upper conductive shield formed in a second conductive layer and a lower conductive shield formed in a fifth conductive layer. A transformer is formed between the upper and lower conductive shields and includes a primary winding formed in a third conductive layer and a secondary winding formed in a fourth conductive layer. The oscillator circuit is connected to the primary winding and adapted to excite the primary winding at a first frequency in response to the input signal, and the detector circuit is connected to the secondary winding and adapted to selectively sense the first frequency and provide the output signal. The third substrate is arranged to form a bridge connection between the first and second substrates.

Abstract translation: 信号隔离器装置包括：第一基板，用于支撑包括用于接收输入信号的高频振荡器电路的输入电路;第二基板，用于支持包括用于提供输出信号的检测器电路的输出电路; 以及具有由绝缘体隔开的平行导电层的第三衬底。 第三基板具有形成在第二导电层中的上导电屏蔽和形成在第五导电层中的下导电屏蔽。 变压器形成在上下导电屏蔽之间，并且包括形成在第三导电层中的初级绕组和形成在第四导电层中的次级绕组。 振荡器电路连接到初级绕组并且适于响应于输入信号以第一频率激励初级绕组，并且检测器电路连接到次级绕组并且适于选择性地感测第一频率并提供输出信号 。 第三基板被布置成在第一和第二基板之间形成桥连接。