Apparatus and method for creating widget in portable terminal
    11.
    发明授权
    Apparatus and method for creating widget in portable terminal 有权
    便携式终端中创建小部件的装置和方法

    公开(公告)号:US08443291B2

    公开(公告)日:2013-05-14

    申请号:US12655381

    申请日:2009-12-30

    IPC分类号: G06F3/00 G06F9/44

    CPC分类号: G06F8/38

    摘要: Provided are an apparatus and a method for creating a widget of a portable terminal. The method includes: determining a building block that a user selects on a widget creating screen including building blocks necessary for widget creation; generating a tag of data corresponding to the confirmed building block; and generating a widget code including the building block and the tag.

    摘要翻译: 提供了一种用于创建便携式终端的小部件的装置和方法。 该方法包括:确定用户在小窗口创建屏幕上选择的构建块,其包括小部件创建所必需的构建块; 产生与所确认的构建块对应的数据标签; 以及生成包括所述构建块和所述标签的小部件代码。

    METHOD OF FABRICATING SUPERHYDROPHOBIC SILICA CHAIN POWDERS
    12.
    发明申请
    METHOD OF FABRICATING SUPERHYDROPHOBIC SILICA CHAIN POWDERS 审中-公开
    制造超级二氧化硅粉末粉末的方法

    公开(公告)号:US20100233061A1

    公开(公告)日:2010-09-16

    申请号:US12749266

    申请日:2010-03-29

    IPC分类号: C01B33/152

    CPC分类号: C01B33/166

    摘要: Disclosed herein is a method of fabricating superhydrophobic silica-based powder, comprising: forming a hydrogel by adding an organosilane compound having alkaline pH and an inorganic acid to a non-ion-exchanged water glass solution, which is a precursor, to form a mixed solution and then surface-modifying and gelating the mixed solution; dipping the hydrogel into a nonpolar solvent to solvent-exchange the hydrogel and remove sodium ions (Na+) therefrom; and drying the solvent-exchanged hydrogel through a fluidized bed drying method under normal pressure or reduced pressure to fabricate aerogel powder. According to the method of fabricating a superhydrophobic silica-based powder of the present invention, the process thereof is very simple and economical. Therefore, the present invention is expected to be industrially important.

    摘要翻译: 本文公开了一种制造超疏水性二氧化硅基粉末的方法,其包括:通过向作为前体的非离子交换水玻璃溶液中加入具有碱性pH和无机酸的有机硅烷化合物形成水凝胶,以形成混合 溶液,然后对混合溶液进行表面改性和凝胶化; 将水凝胶浸入非极性溶剂中以溶剂交换水凝胶并从其中除去钠离子(Na +); 并在常压或减压下通过流化床干燥方法干燥溶剂交换的水凝胶以制备气凝胶粉末。 根据本发明的超疏水性二氧化硅系粉末的制造方法,其工艺非常简单且经济。 因此,本发明预期在工业上是重要的。

    Semiconductor device and method of forming the same
    13.
    发明申请
    Semiconductor device and method of forming the same 审中-公开
    半导体器件及其形成方法

    公开(公告)号:US20090174039A1

    公开(公告)日:2009-07-09

    申请号:US12318774

    申请日:2009-01-08

    IPC分类号: H01L27/00

    摘要: A semiconductor device and a method of forming the same are provided. A semiconductor device may comprise a semiconductor substrate including a main surface configured to define a groove, a trench, and a cavity sequentially disposed downward from a given region of the main surface and open toward the main surface.

    摘要翻译: 提供半导体器件及其形成方法。 半导体器件可以包括半导体衬底,该半导体衬底包括主表面,该主表面被配置为限定从主表面的给定区域向下并且朝向主表面开口的凹槽,沟槽和空腔。

    Method of manufacturing integrated circuit device including recessed channel transistor
    14.
    发明授权
    Method of manufacturing integrated circuit device including recessed channel transistor 失效
    集成电路器件制造方法,包括凹陷沟道晶体管

    公开(公告)号:US07531414B2

    公开(公告)日:2009-05-12

    申请号:US11956153

    申请日:2007-12-13

    IPC分类号: H01L21/31 H01L21/336

    摘要: A method according to some embodiments of the invention includes defining an active region by forming a trench device isolation region on an integrated substrate, forming a mask pattern that exposes a channel sub-region of the active region and the trench device isolation region adjacent to the channel sub-region, etching the trench device isolation region, which is exposed by the mask pattern, to be recessed to a first depth using the mask pattern as an etch mask, etching the channel sub-region to form a gate trench having a second depth that is deeper than the first depth using the mask pattern as an etch mask, and forming a recess gate that fills the gate trench.

    摘要翻译: 根据本发明的一些实施例的方法包括通过在集成衬底上形成沟槽器件隔离区域来限定有源区域,形成掩模图案,其暴露有源区域的沟道子区域和与该区域相邻的沟槽器件隔离区域 使用掩模图案作为蚀刻掩模蚀刻由掩模图案曝光的沟槽器件隔离区域,以凹陷到第一深度,蚀刻沟道子区域以形成栅极沟槽,栅极沟道具有第二 深度比使用掩模图案的第一深度深的蚀刻掩模,以及形成填充栅极沟槽的凹槽。

    Apparatus for treating wafer
    16.
    发明授权
    Apparatus for treating wafer 失效
    晶片处理设备

    公开(公告)号:US07387132B2

    公开(公告)日:2008-06-17

    申请号:US10437594

    申请日:2003-05-13

    申请人: Jong-Chul Park

    发明人: Jong-Chul Park

    IPC分类号: B08B3/00

    摘要: An apparatus for treating a wafer preferably includes a rotating chuck for rotating the wafer and a treating fluid supplying part for supplying the wafer with one or more treating fluids. The treating fluid(s) can be used to clean and/or dry the wafer. The treating fluid supplying part preferably includes a receiving portion for receiving a treating fluid, and a slit communicating with the receiving portion for applying the treating fluid to a surface of the wafer. An ultrasonic oscillating part can be installed in the receiving portion and can apply ultrasonic oscillation to the treating fluid. The treating fluid for applying the ultrasonic oscillation is preferably provided uniformly across the treated surface of the wafer. The effectiveness of the cleaning process can thereby be improved, and damage to patterns formed on the wafer can be reduced.

    摘要翻译: 用于处理晶片的装置优选地包括用于旋转晶片的旋转卡盘和用于向晶片供应一种或多种处理流体的处理流体供应部分。 处理流体可用于清洁和/或干燥晶片。 处理流体供给部件优选地包括用于接收处理流体的接收部分和与接收部分连通的狭缝,用于将处理流体施加到晶片的表面。 超声波振荡部可安装于接收部,能够对处理液施加超声波振动。 用于施加超声波振荡的处理流体优选均匀地提供在晶片的经处理的表面上。 因此可以提高清洁过程的效果,并且可以减少在晶片上形成的图案的损坏。

    Method of forming a recess channel trench pattern, and fabricating a recess channel transistor
    17.
    发明授权
    Method of forming a recess channel trench pattern, and fabricating a recess channel transistor 有权
    形成凹槽沟槽图案的方法,以及制造凹槽通道晶体管

    公开(公告)号:US07205199B2

    公开(公告)日:2007-04-17

    申请号:US10917615

    申请日:2004-08-13

    IPC分类号: H01L21/336

    摘要: A method of forming a recess channel trench pattern for forming a recess channel transistor is provided. A mask layer is formed on a semiconductor substrate, which is then patterned to expose an active region and a portion of an adjacent device isolating layer with an isolated hole type pattern. Using this mask layer the semiconductor substrate and the device isolating layer portion are selectively and anisotropically etched, thereby forming a recess channel trench with an isolated hole type pattern. The mask layer may be patterned to be a curved line type. In this case, the once linear portion is curved to allow the device isolating layer portion exposed by the patterned mask layer to be spaced apart from an adjacent active region. The semiconductor substrate and the device isolating layer portion are then etched, thereby forming a recess channel trench with a curved line type pattern.

    摘要翻译: 提供一种形成用于形成凹槽通道晶体管的凹槽沟槽图案的方法。 掩模层形成在半导体衬底上,然后将其图案化以暴露具有隔离孔型图案的有源区和相邻器件隔离层的一部分。 使用该掩模层,半导体衬底和器件隔离层部分被选择性地和各向异性地蚀刻,从而形成具有隔离孔型图案的凹槽沟槽。 掩模层可以被图案化为曲线型。 在这种情况下,一次线性部分是弯曲的,以允许由图案化掩模层露出的器件隔离层部分与相邻的有源区域间隔开。 然后蚀刻半导体衬底和器件隔离层部分,从而形成具有曲线型图案的凹槽沟槽。

    Field effect transistors having trench-based gate electrodes and methods of forming same
    18.
    发明申请
    Field effect transistors having trench-based gate electrodes and methods of forming same 审中-公开
    具有沟槽栅电极的场效应晶体管及其形成方法

    公开(公告)号:US20050230734A1

    公开(公告)日:2005-10-20

    申请号:US11109422

    申请日:2005-04-19

    摘要: Embodiments of the invention include dynamic random access memory (DRAM) devices that utilize field effect transistors with trench-based gate electrodes. In these devices, a semiconductor substrate is provided having an isolation trench therein. This isolation trench is formed in a first portion of the semiconductor substrate. An electrically insulating liner is provided on a bottom and sidewalls of the isolation trench. The isolation trench is also filled with field oxide region, which extends on the electrically insulating liner. A field effect transistor is also provided in the semiconductor substrate. This transistor includes a gate electrode trench in a second portion of the semiconductor substrate and a gate insulating layer that lines a bottom and sidewalls of the gate electrode trench. A gate electrode is provided in the gate electrode trench. The gate electrode contacts the electrically insulating liner in the isolation trench and the gate insulating layer. Source and drain regions extend in the semiconductor substrate and adjacent the gate electrode.

    摘要翻译: 本发明的实施例包括使用具有基于沟槽的栅电极的场效应晶体管的动态随机存取存储器(DRAM)器件。 在这些器件中,提供了在其中具有隔离沟槽的半导体衬底。 该隔离沟槽形成在半导体衬底的第一部分中。 电绝缘衬垫设置在隔离沟槽的底部和侧壁上。 隔离沟槽还填充有在电绝缘衬垫上延伸的场氧化物区域。 在半导体衬底中还提供场效应晶体管。 该晶体管包括在半导体衬底的第二部分中的栅极电极沟槽和对栅极电极沟槽的底部和侧壁进行排列的栅极绝缘层。 栅电极设置在栅电极沟槽中。 栅电极接触隔离沟槽和栅极绝缘层中的电绝缘衬垫。 源极和漏极区域在半导体衬底中延伸并且与栅电极相邻。

    Method of forming a recess channel trench pattern, and fabricating a recess channel transistor
    19.
    发明申请
    Method of forming a recess channel trench pattern, and fabricating a recess channel transistor 有权
    形成凹槽沟槽图案的方法,以及制造凹槽通道晶体管

    公开(公告)号:US20050077568A1

    公开(公告)日:2005-04-14

    申请号:US10917615

    申请日:2004-08-13

    摘要: A method of forming a recess channel trench pattern for forming a recess channel transistor is provided. A mask layer is formed on a semiconductor substrate, which is then patterned to expose an active region and a portion of an adjacent device isolating layer with an isolated hole type pattern. Using this mask layer the semiconductor substrate and the device isolating layer portion are selectively and anisotropically etched, thereby forming a recess channel trench with an isolated hole type pattern. The mask layer may be patterned to be a curved line type. In this case, the once linear portion is curved to allow the device isolating layer portion exposed by the patterned mask layer to be spaced apart from an adjacent active region. The semiconductor substrate and the device isolating layer portion are then etched, thereby forming a recess channel trench with a curved line type pattern.

    摘要翻译: 提供一种形成用于形成凹槽通道晶体管的凹槽沟槽图案的方法。 掩模层形成在半导体衬底上,然后将其图案化以暴露具有隔离孔型图案的有源区和相邻器件隔离层的一部分。 使用该掩模层,半导体衬底和器件隔离层部分被选择性地和各向异性地蚀刻,从而形成具有隔离孔型图案的凹槽沟槽。 掩模层可以被图案化为曲线型。 在这种情况下,一次线性部分是弯曲的,以允许由图案化掩模层露出的器件隔离层部分与相邻的有源区域间隔开。 然后蚀刻半导体衬底和器件隔离层部分,从而形成具有曲线型图案的凹槽沟槽。

    MOS transistor with recessed gate and method of fabricating the same
    20.
    发明申请
    MOS transistor with recessed gate and method of fabricating the same 失效
    具有凹陷栅极的MOS晶体管及其制造方法

    公开(公告)号:US20050035427A1

    公开(公告)日:2005-02-17

    申请号:US10884223

    申请日:2004-07-01

    摘要: A MOS transistor with a recessed gate and a method of fabricating the same: The MOS transistor comprises a semiconductor substrate, and a trench isolation layer located in a predetermined region of the semiconductor substrate for defining an active region. The trench isolation layer has a negative slope on at least a lower sidewall thereof. A recessed gate is located in a predetermined region of the active region, and a bottom surface of the recessed gate is placed adjacent the negatively slopped sidewall of the trench isolation layer.

    摘要翻译: 具有凹陷栅极的MOS晶体管及其制造方法:MOS晶体管包括半导体衬底和位于半导体衬底的用于限定有源区的预定区域中的沟槽隔离层。 沟槽隔离层在至少其下侧壁上具有负斜率。 凹入栅极位于有源区的预定区域中,并且凹入栅极的底表面邻近沟槽隔离层的负斜面侧壁放置。