公开(公告)号：US20150187614A1

公开(公告)日：2015-07-02

申请号：US14141079

申请日：2013-12-26

Applicant: Lam Research Corporation

Inventor： Keith William Gaff ,  Matthew Busche ,  Anthony Ricci ,  Henry S. Povolny ,  Scott Stevenot

IPC: H01L21/67 ,  H01L21/66 ,  H01J37/32

CPC classification number: H01L22/26 ,  H01J37/32082 ,  H01J37/3244 ,  H01J37/32513 ,  H01J37/32522 ,  H01J37/32532 ,  H01L21/67069

Abstract: A lower electrode assembly useful for supporting a semiconductor substrate in a plasma processing chamber includes a temperature controlled lower base plate, an upper plate, a mounting groove surrounding a bond layer and an edge seal comprising a ring compressed in the groove. A gas source supplies inert gas to the groove and maintains the inert gas at a pressure of 100 mTorr to 100 Torr in the groove.

Abstract translation: 用于在等离子体处理室中支撑半导体衬底的下电极组件包括温度控制的下基板，上板，围绕结合层的安装槽和包括在槽中压缩的环的边缘密封。 气体源向凹槽供应惰性气体，并将惰性气体保持在槽中的100mTorr至100Torr的压力。

公开(公告)号：US20140154819A1

公开(公告)日：2014-06-05

申请号：US13690745

申请日：2012-11-30

Applicant: LAM RESEARCH CORPORATION

Inventor： Keith William Gaff ,  Tom Anderson ,  Keith Comendant ,  Ralph Jan-Pin Lu ,  Paul Robertson ,  Eric A. Pape ,  Neil Benjamin

IPC: H01L21/3065

CPC classification number: H01L22/14 ,  H01L21/67103 ,  H01L21/67109 ,  H01L21/67248 ,  H01L21/6831 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor substrate support for supporting a semiconductor substrate in a plasma processing chamber includes a heater array comprising thermal control elements operable to tune a spatial temperature profile on the semiconductor substrate, the thermal control elements defining heater zones each of which is powered by two or more power supply lines and two or more power return lines wherein each power supply line is connected to at least two of the heater zones and each power return line is connected to at least two of the heater zones. A power distribution circuit is mated to a baseplate of the substrate support, the power distribution circuit being connected to each power supply line and power return line of the heater array. A switching device is connected to the power distribution circuit to independently provide time-averaged power to each of the heater zones by time divisional multiplexing of a plurality of switches.

Abstract translation: 用于在等离子体处理室中支撑半导体衬底的半导体衬底支撑件包括加热器阵列，其包括用于调节半导体衬底上的空间温度分布的热控制元件，热控制元件限定加热器区域，每个加热器区域由两个或更多个 电源线和两个或更多个电力返回线，其中每个电源线连接到至少两个加热器区域，并且每个电力返回线路连接到至少两个加热器区域。 配电电路配合到基板支架的基板上，配电电路连接到加热器阵列的每个电源线和电源返回线。 开关装置连接到配电电路，以通过多个开关的时分复用来独立地为每个加热器区提供时间平均功率。

公开(公告)号：US08587113B2

公开(公告)日：2013-11-19

申请号：US13912907

申请日：2013-06-07

Applicant: Lam Research Corporation

Inventor： Keith William Gaff ,  Keith Comendant ,  Anthony Ricci

IPC: H01L23/48 ,  H01L23/52

CPC classification number: F25B21/04 ,  H01L21/0201 ,  H01L21/67109 ,  H01L21/67248 ,  H01L21/6831 ,  H01L35/34 ,  Y10T29/49083 ,  Y10T29/49165

Abstract: A thermal plate for a substrate support assembly in a semiconductor plasma processing apparatus, includes multiple independently controllable planar thermal zones arranged in a scalable multiplexing layout, and electronics to independently control and power the planar heater zones. Each planar thermal zone uses at least one Peltier device as a thermoelectric element. A substrate support assembly in which the thermal plate is incorporated has an electrostatic clamping electrode layer and a temperature controlled base plate. Methods for manufacturing the thermal plate include bonding together ceramic or polymer sheets having planar thermal zones, positive, negative and common lines and vias.

Abstract translation: 在半导体等离子体处理装置中用于衬底支撑组件的热板包括以可伸缩复用布局布置的多个可独立控制的平面热区，以及用于独立地控制和供电平面加热器区的电子装置。 每个平面热区使用至少一个珀耳帖装置作为热电元件。 其中结合有热敏板的基板支撑组件具有静电夹持电极层和温度控制的基板。 用于制造热板的方法包括将具有平面热区域，正，负和公共线路和通孔的陶瓷或聚合物片材结合在一起。

公开(公告)号：US20240077138A1

公开(公告)日：2024-03-07

申请号：US18377371

申请日：2023-10-06

Applicant: Lam Research Corporation

Inventor： David SCHAEFER ,  Ambarish Chhatre ,  Keith William Gaff ,  Sung Je Kim ,  Brooke Mesler Lai

IPC: F16J15/02 ,  H01J37/32 ,  H01L21/683 ,  H02N13/00

CPC classification number: F16J15/021 ,  H01J37/32495 ,  H01J37/32532 ,  H01J37/3255 ,  H01J37/32568 ,  H01J37/32715 ,  H01J37/32724 ,  H01L21/6831 ,  H01L21/6833 ,  H01L21/6838 ,  H02N13/00 ,  Y10T29/49908

Abstract: An edge seal for sealing an outer surface of a lower electrode assembly configured to support a semiconductor substrate in a plasma processing chamber, the lower electrode assembly including an annular groove defined between a lower member and an upper member of the lower electrode assembly. The edge seal includes an elastomeric band configured to be arranged within the groove, the elastomeric band having an annular upper surface, an annular lower surface, an inner surface, and an outer surface. When the elastomeric band is in an uncompressed state, the outer surface of the elastomeric band is concave. When the upper and lower surfaces are axially compressed at least 1% such that the elastomeric band is in a compressed state, an outward bulging of the outer surface is not greater than a predetermined distance. The predetermined distance corresponds to a maximum outer diameter of the elastomeric band in the uncompressed state.

公开(公告)号：US10437236B2

公开(公告)日：2019-10-08

申请号：US15657858

申请日：2017-07-24

Applicant: LAM RESEARCH CORPORATION

Inventor： Ole Waldmann ,  Eric A. Pape ,  Carlos Leal-Verdugo ,  Keith William Gaff

IPC: G05B19/418 ,  H01L21/67

Abstract: A method of determining thermal stability of an upper surface of a substrate support assembly in a plasma processing apparatus includes: before processing of at least one substrate in the plasma processing apparatus and while powering an array of thermal control elements of the substrate support assembly to achieve a desired spatial and temporal temperature of the upper surface of the substrate support assembly, recording pre-process temperature data of the substrate support assembly; after the processing of the at least one substrate in the plasma processing apparatus and while powering the array of thermal control elements to achieve the desired spatial and temporal temperature of the upper surface of the substrate support assembly, recording post-process temperature data; comparing the post-process temperature data to the pre-process temperature data; and determining whether the post-process temperature data is within a predetermined tolerance range of the pre-process temperature data.

公开(公告)号：US10381248B2

公开(公告)日：2019-08-13

申请号：US14859951

申请日：2015-09-21

Applicant: Lam Research Corporation

Inventor： Benny Wu ,  Eric A. Pape ,  Keith William Gaff

IPC: H01L21/67 ,  H01L21/683 ,  H01L21/324 ,  H01L21/66

Abstract: A system for controlling a temperature of a wafer processing substrate includes memory that stores first data indicative of first temperature responses of at least one first thermal control element. The first data corresponds to the first temperature responses as observed when a first control parameter of the at least one first thermal control element is maintained at a first predetermined first value. A first controller receives a setpoint temperature for the wafer processing substrate and maintains the first control parameter of the at least one first thermal control element at a second value based on the received setpoint temperature. A second controller retrieves the first data from the memory, calculates second data indicative of temperature non-uniformities associated with the wafer processing substrate based on the first data and the second value, and controls a plurality of second thermal control elements based on the calculated second data.

公开(公告)号：US10049948B2

公开(公告)日：2018-08-14

申请号：US13690745

申请日：2012-11-30

Applicant: Lam Research Corporation

Inventor： Keith William Gaff ,  Tom Anderson ,  Keith Comendant ,  Ralph Jan-Pin Lu ,  Paul Robertson ,  Eric A. Pape ,  Neil Benjamin

IPC: H01L21/67 ,  H01L21/66 ,  H01L21/683

Abstract: A semiconductor substrate support for supporting a semiconductor substrate in a plasma processing chamber includes a heater array comprising thermal control elements operable to tune a spatial temperature profile on the semiconductor substrate, the thermal control elements defining heater zones each of which is powered by two or more power supply lines and two or more power return lines wherein each power supply line is connected to at least two of the heater zones and each power return line is connected to at least two of the heater zones. A power distribution circuit is mated to a baseplate of the substrate support, the power distribution circuit being connected to each power supply line and power return line of the heater array. A switching device is connected to the power distribution circuit to independently provide time-averaged power to each of the heater zones by time divisional multiplexing of a plurality of switches.

公开(公告)号：US20180106371A1

公开(公告)日：2018-04-19

申请号：US15843849

申请日：2017-12-15

Applicant: Lam Research Corporation

Inventor： David Schaefer ,  Ambarish Chhatre ,  Keith William Gaff ,  Sung Lee ,  Brooke Mesler Lai

IPC: F16J15/02 ,  H01J37/32 ,  H02N13/00 ,  H01L21/683

Abstract: An edge seal for sealing an outer surface of a lower electrode assembly configured to support a semiconductor substrate in a plasma processing chamber, the lower electrode assembly including an annular groove defined between a lower member and an upper member of the lower electrode assembly. The edge seal includes an elastomeric band configured to be arranged within the groove, the elastomeric band having an annular upper surface, an annular lower surface, an inner surface, and an outer surface. When the elastomeric band is in an uncompressed state, the outer surface of the elastomeric band is concave. When the upper and lower surfaces are axially compressed at least 1% such that the elastomeric band is in a compressed state, an outward bulging of the outer surface is not greater than a predetermined distance. The predetermined distance corresponds to a maximum outer diameter of the elastomeric band in the uncompressed state.

公开(公告)号：US09543171B2

公开(公告)日：2017-01-10

申请号：US14307062

申请日：2014-06-17

Applicant: Lam Research Corporation

Inventor： Ole Waldmann ,  Eric A. Pape ,  Keith William Gaff ,  Harmeet Singh

IPC: H01L21/00 ,  H01L21/67

CPC classification number: H01L21/67109 ,  H01L21/67248 ,  H01L21/67288

Abstract: A method for auto-correction of at least one malfunctioning thermal control element among an array of thermal control elements that are independently controllable and located in a temperature control plate of a substrate support assembly which supports a semiconductor substrate during processing thereof, the method including: detecting, by a control unit including a processor, that at least one thermal control element of the array of thermal control elements is malfunctioning; deactivating, by the control unit, the at least one malfunctioning thermal control element; and modifying, by the control unit, a power level of at least one functioning thermal control element in the temperature control plate to minimize impact of the malfunctioning thermal control element on the desired temperature output at the location of the at least one malfunctioning thermal control element.

Abstract translation: 一种用于自动校正热控制元件阵列中的至少一个故障热控元件的方法，所述热控制元件阵列可独立控制并位于在其处理期间支撑半导体衬底的衬底支撑组件的温度控制板中，所述方法包括： 通过包括处理器的控制单元检测所述热控元件阵列中的至少一个热控元件是故障的; 由所述控制单元使所述至少一个故障热控制元件停用; 以及通过所述控制单元修改所述温度控制板中的至少一个功能性热控制元件的功率水平，以使所述故障热控制元件对所述至少一个故障热控制元件的位置处的期望温度输出的影响最小化 。

公开(公告)号：US20150168962A1

公开(公告)日：2015-06-18

申请号：US14109020

申请日：2013-12-17

Applicant: Lam Research Corporation

Inventor： Ole Waldmann ,  Eric A. Pape ,  Carlos Leal-Verdugo ,  Keith William Gaff

IPC: G05D23/19 ,  G05B19/418

CPC classification number: G05B19/418 ,  H01L21/67103 ,  H01L21/67248

Abstract: A method of determining thermal stability of an upper surface of a substrate support assembly comprises recording time resolved pre-process temperature data of the substrate before performing a plasma processing process while powering an array of thermal control elements to achieve a desired spatial and temporal temperature of the upper surface. A substrate is processed while powering the array of thermal control elements to achieve a desired spatial and temporal temperature of the upper surface of the assembly, and time resolved post-process temperature data of the assembly is recorded after processing the substrate. The post-process temperature data is recorded while powering the thermal control elements to achieve a desired spatial and temporal temperature of the upper surface. The post-process temperature data is compared to the pre-process temperature data to determine whether the data is within a desired tolerance range.

Abstract translation: 确定衬底支撑组件的上表面的热稳定性的方法包括在执行等离子体处理过程之前记录衬底的时间分辨的预处理温度数据，同时为热控制元件的阵列供电以实现期望的空间和时间温度 上表面。 处理衬底，同时为热控制元件阵列供电，以实现组件的上表面的期望的空间和时间温度，并且在处理衬底之后记录组件的时间分辨的后处理温度数据。 记录后处理温度数据，同时为热控制元件供电以实现上表面的期望的空间和时间温度。 将后处理温度数据与预处理温度数据进行比较，以确定数据是否在期望的公差范围内。