Abstract:
A display device includes a first substrate; a second substrate facing the first substrate; a plurality of first electrodes and a plurality of second electrodes disposed between the first substrate and the second substrate; a third electrode on an outer side of the first substrate or the second substrate, the third electrode including an organic material and a carbon nano-tube; a plurality of first conductive lines extending along a first direction; a plurality of second conductive lines extending along the first direction; a plurality of third conductive lines extending along a second direction; and a thin film transistor including a semiconductor layer, a gate electrode, a source electrode, and a drain electrode. A sheet resistance of the third electrode may be greater than a sheet resistance of each of the plurality of first electrodes and a sheet resistance of each of the plurality of second electrodes.
Abstract:
A driving thin film transistor includes an insulation layer disposed on a substrate and including a first groove; a first active layer corresponding to the first groove and including a channel region and source and drain regions at both sides of the channel region; first source and first drain electrodes spaced apart from each other and being in contact with the source and drain regions, respectively; and a gate electrode overlapping the channel region, wherein the channel region is disposed on a bottom surface and inner side surfaces of the first groove, and the source and drain regions are disposed on a top surface of the insulation layer.
Abstract:
A thin film transistor (TFT) substrate comprises a TFT located on a substrate and including a gate electrode, a first semiconductor layer and a second semiconductor layer, wherein the first semiconductor layer, the gate electrode and the second semiconductor layer vertically stacked, and the first and second semiconductor layers are made of polycrystalline silicon, and wherein the first and second semiconductor layers are electrically connected to each other in series and respectively include first and second channel portions, and at least one of the first and second channel portions has a bent structure in a plan view.
Abstract:
A method of manufacturing an array substrate for a fringe field switching mode liquid crystal display includes: forming an auxiliary insulating layer on a second passivation layer and having a first thickness; forming first and second photoresist patterns on the auxiliary insulating layer and having second and third thicknesses, respectively, the second thickness greater than the third thickness; etching the auxiliary insulating layer, the second passivation layer and a first passivation layer to form a drain contact hole; performing an ashing to remove the second photoresist pattern and expose the auxiliary insulating layer therebelow; performing a dry etching to remove the auxiliary insulating layer not covered by the first photoresist pattern and expose the first passivation layer and to form an insulating pattern below the first photoresist pattern, the insulating pattern and the first photoresist pattern forming an undercut shape; forming a transparent conductive material layer having a fourth thickness less than the first thickness; and performing a lift-off process to remove the first photoresist pattern and the transparent conductive material layer thereon together and form a pixel electrode as a remaining portion of the transparent conductive material layer.
Abstract:
A thin film transistor and a display panel having the same are provided. A display panel includes a substrate, an active layer disposed over the substrate and including a source region, a drain region, and a middle region between the source region and the drain region, and a gate electrode over the active layer and disposed overlapping with the middle region, and the active layer includes a plurality of holes disposed symmetrically with respect to the middle region. The display panel can improve its reliability owing to heat dissipation paths through the plurality of holes.
Abstract:
A touch sensing type liquid crystal display device includes an array substrate includes a first substrate, a common electrode, a pixel electrode, and a touch sensing unit; a color filter substrate including a second substrate and facing the array substrate; an anti-static layer on an outer side of the second substrate and including an organic material and a carbon nano-tube; and a liquid crystal layer between the first substrate and an inner side of the second substrate.
Abstract:
Disclosed are a backplane substrate that is capable of expressing high gradation even through a small pixel, a method of manufacturing the same, and an organic light-emitting display device using the same. Integration for ultra-high resolution is possible through structural modification.
Abstract:
Disclosed are a backplane substrate, which is devised to attain circuit characteristics for realizing sufficient gradation even in smaller pixels of a super-high-resolution structure, a manufacturing method for the same, and an organic light-emitting display device using the same, inn the backplane substrate, a driving thin-film transistor has a stack structure different from that of other thin-film transistors so that only the S-factor of the driving thin-film transistor is increased.
Abstract:
Disclosed are a backplane substrate which secures sufficient storage capacitance even when using small sub-pixels in a structure having very high resolution, and an organic light emitting diode display using the same. The backplane substrate includes storage capacitors including a first storage electrode, a second storage electrode partially overlapping the first storage electrode, a second storage connection electrode overlapping the first and second storage electrodes and connected to the second storage electrode at a first node, and a first storage connection electrode overlapping the second storage connection electrode and connected to the first storage electrode at a second node at which the first and second storage electrodes do not overlap each other, in a storage capacitor region defined by intersecting a scan line, a first voltage line and a data line at each sub-pixel.