公开(公告)号：US20230046413A1

公开(公告)日：2023-02-16

申请号：US17812786

申请日：2022-07-15

Applicant: MEDIATEK INC.

Inventor： Tai-Yu CHEN ,  Chin-Lai CHEN ,  Hsiao-Yun CHEN ,  Wen-Sung HSU ,  Haw-Kuen SU ,  Duen-Yi HO ,  Bo-Jiun YANG ,  Ta-Jen YU ,  Bo-Hao MA

IPC: H01L25/10 ,  H01L25/18

Abstract: A semiconductor assembly package is provided. The semiconductor package assembly includes a system-on-chip (SOC) package, a memory package and a heat spreader. The SOC package includes a logic die and a first substrate. The logic die has pads on it. The first substrate is electrically connected to the logic die by the pads. The memory package includes a second substrate and a memory die. The second substrate has a top surface and a bottom surface. The memory die is mounted on the top surface of the second substrate and is electrically connected to the second substrate using bonding wires. The heat spreader is disposed between the SOC package and the memory package, wherein the heat spreader is in contact with a back surface of the logic die away from the pads.

公开(公告)号：US20220328378A1

公开(公告)日：2022-10-13

申请号：US17700571

申请日：2022-03-22

Applicant: MEDIATEK Inc.

Inventor： Bo-Jiun YANG ,  Wen-Sung HSU ,  Tai-Yu CHEN ,  Sheng-Liang KUO ,  Chia-Hao HSU

IPC: H01L23/42 ,  H01L21/48

Abstract: A semiconductor device includes a substrate, an electronic component, a cover and a liquid metal. The electronic component is disposed on the substrate. The cover is disposed on the substrate and covers the electronic component. The liquid metal is formed between the cover and the electronic component.

公开(公告)号：US20150115429A1

公开(公告)日：2015-04-30

申请号：US14585575

申请日：2014-12-30

Applicant: MediaTek Inc.

Inventor： Tai-Yu CHEN ,  Chung-Fa LEE ,  Wen-Sung HSU ,  Shih-Chin LIN

IPC: H01L23/373 ,  H01L23/00 ,  H01L23/367 ,  H01L23/498 ,  H01L23/29 ,  H01L23/31

CPC classification number: H01L23/3736 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/36 ,  H01L23/3675 ,  H01L23/4334 ,  H01L23/49816 ,  H01L24/33 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/48095 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor package with reduced warpage problem is provided, including: a circuit board, having opposing first and second surfaces; a semiconductor chip, formed over a center portion of the first surface of the circuit board, having a first cross sectional dimension; a spacer, formed over a center portion of the semiconductor chip, having a second cross sectional dimension less than that of the first cross sectional dimension; an encapsulant layer, formed over the circuit board, covering the semiconductor chip and surrounding the spacer; a heat spreading layer, formed over the encapsulant layer and the spacer; and a plurality of solder balls, formed over the second surface of the circuit board, wherein a ratio between the first cross sectional dimension and the second cross sectional dimension is about 1:2-1:6.

Abstract translation: 提供一种具有降低翘曲问题的半导体封装，包括：具有相对的第一和第二表面的电路板; 半导体芯片，形成在电路板的第一表面的中心部分上，具有第一横截面尺寸; 形成在所述半导体芯片的中心部分上的间隔物，具有小于所述第一横截面尺寸的第二截面尺寸; 形成在电路板上的密封剂层，覆盖半导体芯片并围绕间隔物; 形成在密封剂层和间隔物上的散热层; 以及形成在电路板的第二表面上的多个焊球，其中第一横截面尺寸和第二横截面尺寸之间的比率为约1：2-1：6。