公开(公告)号：US20160308126A1

公开(公告)日：2016-10-20

申请号：US15193328

申请日：2016-06-27

Applicant: Micron Technology, Inc.

Inventor： Hyun Sik Kim ,  Irina V. Vasilyeva ,  Kyle B. Campbell ,  Kyuchul Chong

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/124 ,  H01L21/02126 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/02271 ,  H01L21/02348 ,  H01L21/56 ,  H01L23/3121 ,  H01L23/3135 ,  H01L25/065 ,  H01L27/2427 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/065 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/128 ,  H01L45/144 ,  H01L45/16 ,  H01L45/1675

Abstract: Some embodiments include methods of forming structures. Spaced-apart features are formed which contain temperature-sensitive material. Liners are formed along sidewalls of the features under conditions which do not expose the temperature-sensitive material to a temperature exceeding 300° C. The liners extend along the temperature-sensitive material and narrow gaps between the spaced-apart features. The narrowed gaps are filled with flowable material which is cured under conditions that do not expose the temperature-sensitive material to a temperature exceeding 300° C. In some embodiments, the features contain memory cell regions over select device regions. The memory cell regions include first chalcogenide and the select device regions include second chalcogenide. The liners extend along and directly against the first and second chalcogenides.

公开(公告)号：US20220238417A1

公开(公告)日：2022-07-28

申请号：US17721919

申请日：2022-04-15

Applicant: Micron Technology, Inc.

Inventor： Zhuo Chen ,  Irina V. Vasilyeva ,  Darwin Franseda Fan ,  Kamal Kumar Muthukrishnan

IPC: H01L23/48 ,  H01L27/108 ,  H01L27/11504 ,  H01L21/48 ,  H01L27/11507 ,  H01L27/11509

Abstract: Some embodiments include a method of forming an integrated assembly. Semiconductor material is patterned into a configuration which includes a set of first upwardly-projecting structures spaced from one another by first gaps, and a second upwardly-projecting structure spaced from the set by a second gap. The second gap is larger than the first gaps. Conductive material is formed along the first and second upwardly-projecting structures and within the first and second gaps. First and second segments of protective material are formed over regions of the conductive material within the second gap, and then an etch is utilized to pattern the conductive material into first conductive structures within the first gaps and into second conductive structures within the second gap. Some embodiments include integrated assemblies.

公开(公告)号：US11335626B2

公开(公告)日：2022-05-17

申请号：US17021793

申请日：2020-09-15

Applicant: Micron Technology, Inc.

Inventor： Zhuo Chen ,  Irina V. Vasilyeva ,  Darwin Franseda Fan ,  Kamal Kumar Muthukrishnan

IPC: H01L23/48 ,  H01L27/108 ,  H01L27/11504 ,  H01L21/48 ,  H01L27/11507 ,  H01L27/11509

Abstract: Some embodiments include a method of forming an integrated assembly. Semiconductor material is patterned into a configuration which includes a set of first upwardly-projecting structures spaced from one another by first gaps, and a second upwardly-projecting structure spaced from the set by a second gap. The second gap is larger than the first gaps. Conductive material is formed along the first and second upwardly-projecting structures and within the first and second gaps. First and second segments of protective material are formed over regions of the conductive material within the second gap, and then an etch is utilized to pattern the conductive material into first conductive structures within the first gaps and into second conductive structures within the second gap. Some embodiments include integrated assemblies.

公开(公告)号：US20220084906A1

公开(公告)日：2022-03-17

申请号：US17021793

申请日：2020-09-15

Applicant: Micron Technology, Inc.

Inventor： Zhuo Chen ,  Irina V. Vasilyeva ,  Darwin Franseda Fan ,  Kamal Kumar Muthukrishnan

IPC: H01L23/48 ,  H01L27/108 ,  H01L27/11504 ,  H01L27/11509 ,  H01L27/11507 ,  H01L21/48

Abstract: Some embodiments include a method of forming an integrated assembly. Semiconductor material is patterned into a configuration which includes a set of first upwardly-projecting structures spaced from one another by first gaps, and a second upwardly-projecting structure spaced from the set by a second gap. The second gap is larger than the first gaps. Conductive material is formed along the first and second upwardly-projecting structures and within the first and second gaps. First and second segments of protective material are formed over regions of the conductive material within the second gap, and then an etch is utilized to pattern the conductive material into first conductive structures within the first gaps and into second conductive structures within the second gap. Some embodiments include integrated assemblies.

公开(公告)号：US10923478B2

公开(公告)日：2021-02-16

申请号：US16258986

申请日：2019-01-28

Applicant: Micron Technology, Inc.

Inventor： Christopher J. Gambee ,  Devesh Dadhich Shreeram ,  Irina V. Vasilyeva

IPC: H01L27/108 ,  H01L21/02 ,  H01G4/008 ,  H01G4/08 ,  H01G4/012 ,  H01G4/33 ,  H01L49/02

Abstract: Methods, apparatuses, and systems related to reduction of roughness on a sidewall of an opening are described. An example method includes forming a liner material on a first sidewall of an opening in a first silicate material and on a second sidewall of the opening in an overlying second silicate material, where the liner material is formed to a thickness that covers a roughness on the first sidewall extending into the opening. The example method further includes removing the liner material from the first sidewall of the opening and the second sidewall of the opening with a non-selective etch chemistry to reduce the roughness on the first sidewall.

公开(公告)号：US09401474B2

公开(公告)日：2016-07-26

申请号：US14321419

申请日：2014-07-01

Applicant: Micron Technology, Inc.

Inventor： Hyun Sik Kim ,  Irina V. Vasilyeva ,  Kyle B. Campbell ,  Kyuchul Chong

IPC: H01L45/00 ,  H01L27/24 ,  H01L21/56 ,  H01L21/02

CPC classification number: H01L45/124 ,  H01L21/02126 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/02271 ,  H01L21/02348 ,  H01L21/56 ,  H01L23/3121 ,  H01L23/3135 ,  H01L25/065 ,  H01L27/2427 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/065 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/128 ,  H01L45/144 ,  H01L45/16 ,  H01L45/1675

Abstract: Some embodiments include methods of forming structures. Spaced-apart features are formed which contain temperature-sensitive material. Liners are formed along sidewalls of the features under conditions which do not expose the temperature-sensitive material to a temperature exceeding 300° C. The liners extend along the temperature-sensitive material and narrow gaps between the spaced-apart features. The narrowed gaps are filled with flowable material which is cured under conditions that do not expose the temperature-sensitive material to a temperature exceeding 300° C. In some embodiments, the features contain memory cell regions over select device regions. The memory cell regions include first chalcogenide and the select device regions include second chalcogenide. The liners extend along and directly against the first and second chalcogenides.

Abstract translation: 一些实施方案包括形成结构的方法。 形成了包含温度敏感材料的间隔特征。 在不将温度敏感材料暴露于超过300℃的温度的条件下，衬垫沿着特征的侧壁形成。衬垫沿着温度敏感材料延伸并且间隔开的特征之间的间隙变窄。 狭窄的间隙填充有可流动材料，其在不使温度敏感材料暴露于超过300℃的条件下固化。在一些实施例中，特征包含超过选择的器件区域的存储单元区域。 存储单元区域包括第一硫族化物，选择装置区域包括第二硫族化物。 衬垫沿着并直接抵靠第一和第二硫族化物。