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公开(公告)号:US06555918B2
公开(公告)日:2003-04-29
申请号:US10103775
申请日:2002-03-25
申请人: Masachika Masuda , Tamaki Wada , Michiaki Sugiyama , Hirotaka Nishizawa , Toshio Sugano , Yasushi Takahashi , Masayasu Kawamura
发明人: Masachika Masuda , Tamaki Wada , Michiaki Sugiyama , Hirotaka Nishizawa , Toshio Sugano , Yasushi Takahashi , Masayasu Kawamura
IPC分类号: H01L2348
CPC分类号: H01L24/06 , H01L23/4951 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2224/04042 , H01L2224/05554 , H01L2224/05599 , H01L2224/06136 , H01L2224/32145 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/4826 , H01L2224/48599 , H01L2224/49113 , H01L2224/49171 , H01L2224/73215 , H01L2224/85201 , H01L2224/85205 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01039 , H01L2924/01055 , H01L2924/01058 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/07802 , H01L2924/12042 , H01L2924/14 , H01L2924/181 , H01L2924/30105 , H01L2924/3011 , Y10T29/49121 , H01L2924/00 , H01L2924/00012 , H01L2224/85399
摘要: A semiconductor device comprising a resin mold, two semiconductor chips positioned inside the resin mold and having front and back surfaces and external terminals formed on the front surfaces, and leads extending from the inside to the outside of the resin mold, wherein each of said leads is branched into two branch leads in at least the resin mold, the one branch lead is secured to the surface of the one semiconductor chip and is electrically connected to an external terminal on the surface thereof through a wire, the other branch lead is secured to the surface of the other semiconductor chip and is electrically connected to an external terminal on the surface thereof through a wire, and the two semiconductor chips are stacked one upon the other, with their back surfaces opposed to each other.
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公开(公告)号:US06383845B2
公开(公告)日:2002-05-07
申请号:US09854626
申请日:2001-05-15
申请人: Masachika Masuda , Tamaki Wada , Michiaki Sugiyama , Hirotaka Nishizawa , Toshio Sugano , Yasushi Takahashi , Masayasu Kawamura
发明人: Masachika Masuda , Tamaki Wada , Michiaki Sugiyama , Hirotaka Nishizawa , Toshio Sugano , Yasushi Takahashi , Masayasu Kawamura
IPC分类号: H01L2144
CPC分类号: H01L24/06 , H01L23/4951 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2224/04042 , H01L2224/05554 , H01L2224/05599 , H01L2224/06136 , H01L2224/32145 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/4826 , H01L2224/48599 , H01L2224/49113 , H01L2224/49171 , H01L2224/73215 , H01L2224/85201 , H01L2224/85205 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01039 , H01L2924/01055 , H01L2924/01058 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/07802 , H01L2924/12042 , H01L2924/14 , H01L2924/181 , H01L2924/30105 , H01L2924/3011 , Y10T29/49121 , H01L2924/00 , H01L2924/00012 , H01L2224/85399
摘要: A semiconductor device comprising a resin mold, two semiconductor chips positioned inside the resin mold and having front and back surfaces and external terminals formed on the front surfaces, and leads extending from the inside to the outside of the resin mold, wherein each of said leads is branched into two branch leads in at least the resin mold, the one branch lead is secured to the surface of the one semiconductor chip and is electrically connected to an external terminal on the surface thereof through a wire, the other branch lead is secured to the surface of the other semiconductor chip and is electrically connected to an external terminal on the surface thereof through a wire, and the two semiconductor chips are stacked one upon the other, with their back surfaces opposed to each other.
摘要翻译: 一种半导体器件,包括树脂模具,位于树脂模具内部的两个半导体芯片,具有形成在前表面上的前后表面和外部端子以及从树脂模具的内部延伸到外部的引线,其中每个所述引线 至少在树脂模具中分支成两个分支引线,一个分支引线固定到一个半导体芯片的表面,并通过导线与表面上的外部端子电连接,另一个分支引线被固定到 另一个半导体芯片的表面,并通过导线与表面上的外部端子电连接,并且两个半导体芯片彼此堆叠,并且它们的背面彼此相对。
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公开(公告)号:US06566432B2
公开(公告)日:2003-05-20
申请号:US09880936
申请日:2001-06-15
申请人: Masayasu Kawamura , Masashi Koide
发明人: Masayasu Kawamura , Masashi Koide
IPC分类号: C08L506
CPC分类号: C08J3/226 , C08J2423/00
摘要: Disclosed is a coloring resin composition comprising a dispersing agent, a pigment and a thermoplastic resin, in which the dispersing agent is expressed by the following Formula 1 and the thermoplastic resin is metallocene polyolefin: CnH2n+1(OCH2CH2)mOH Formula 1 wherein n is an integer of 26 to 50, and m is an integer of 4 to 100. The composition is useful in coloring molded articles of thermoplastic resin. Colored resin molded articles using the composition are also disclosed.
摘要翻译: 公开了一种着色树脂组合物,其包含分散剂,颜料和热塑性树脂,其中分散剂由下式1表示,热塑性树脂为茂金属聚烯烃:其中n为26-50的整数,m 为4〜100的整数。该组合物可用于着色热塑性树脂的模塑制品。 还公开了使用该组合物的着色树脂模塑制品。
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公开(公告)号:US07001937B2
公开(公告)日:2006-02-21
申请号:US10240831
申请日:2002-02-14
申请人: Hitoshi Maki , Masayasu Kawamura , Masashi Koide
发明人: Hitoshi Maki , Masayasu Kawamura , Masashi Koide
CPC分类号: C08J3/215 , C08J3/2056 , C08J2323/02
摘要: A process for the production of a colored resin composition, comprising a step (A) of producing an aqueous slurry of a pigment, a step (B) of producing a melting composition of metallocene type polyolefin containing a dispersant and a solvent, a step (C) of kneading the aqueous slurry obtained in the step (A) with the melting composition obtained in the step (B) and a step (D) of removing the solvent and the water from the kneaded mixture obtained in the step (C), a colored composition obtained in the above process has excellent in pigment dispersibility and high color developing properties, a colored resin molded article obtained from the colored resin composition do not give a physical-properties inhibition of 5% or higher and has a color developing properties.
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公开(公告)号:US5498897A
公开(公告)日:1996-03-12
申请号:US270085
申请日:1994-07-01
IPC分类号: H01L27/105 , H01L27/11 , H01L29/772
CPC分类号: H01L27/105 , Y10S257/927
摘要: A semiconductor integrated circuit comprising a MOSFET having a metal wiring layer formed via an insulating film above and along the gate electrode of the MOSFET. The MOSFET is structured such that its channel length is small or channel width is large, and an input signal is applied from at least both end sides of the gate electrode thereof. Since the metal wiring layer for the input signal is formed on the gate electrode of the MOSFET, high-speed operation is possible without increasing the layout area. FIG. 1.
摘要翻译: 一种半导体集成电路,包括具有金属布线层的MOSFET,所述金属布线层经由MOSFET上方并沿着栅极电极的绝缘膜形成。 MOSFET的结构使得其沟道长度小或沟道宽度大,并且从其栅电极的至少两端侧施加输入信号。 由于用于输入信号的金属布线层形成在MOSFET的栅电极上,因此可以在不增加布局面积的情况下进行高速运算。 图。 1。
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公开(公告)号:US5596535A
公开(公告)日:1997-01-21
申请号:US267267
申请日:1994-06-28
摘要: A semiconductor storage device equipped with redundant circuits designed to increase the operating speed and to simplify the layout by providing for the detection of the storage of a faulty address and access to the faulty address so as to substitute a spare word line for a faulty word line. The semiconductor storage device includes a MOSFET for causing current to flow through a pair of fuse means by a complementary address signal at one end of a fuse means corresponding to each bit of the faulty address. The other end thereof is connected to a wired OR logic so as to generate a decision signal. The fuse means corresponding to the MOSFET which is turned on by the faulty address signal is cut off to store a faulty address. The faulty address storage and comparison units can be formed with the pair of fuses and the MOSFET. High-speed operation and a high-density layout in the form of a matrix can thus be achieved efficiently by switching the faulty circuit to a spare circuit while the normal decoder is operating.
摘要翻译: 一种装备有冗余电路的半导体存储装置,其设计用于通过提供对故障地址的存储的检测和对故障地址的访问来提高操作速度和简化布局,以便将备用字线替换为有缺陷的字线 。 半导体存储装置包括用于使电流通过对应于故障地址的每个位的熔丝装置的一端的互补地址信号流过一对熔丝装置的MOSFET。 其另一端连接到有线OR逻辑,以产生判定信号。 对应于通过故障地址信号导通的MOSFET的熔丝装置被切断以存储故障地址。 故障地址存储和比较单元可以由一对保险丝和MOSFET形成。 因此,在通常的解码器工作时,通过将故障电路切换到备用电路,能够有效地实现矩阵形式的高速运转和高密度布局。
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