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公开(公告)号：US07594043B2
公开(公告)日：2009-09-22
申请号：US11341921
申请日：2006-01-27
IPC分类号： G06F13/00
CPC分类号： G06F3/0632 , G06F3/0607 , G06F3/0676 , G11B33/12
摘要： Techniques for reducing dismount time for a peripheral device connected to an external host device are presented. Instead of waiting for a dismount procedure to complete, a reply message indicating that dismount operations have been completed is sent to the external host device. This triggers a message from the external host device that the peripheral device is ready to be safely removed. The peripheral device completes the dismount operations including cache and memory cleanup after the reply message indicating that dismount operations have been completed is sent to the external host device. The dismount operations may be completed under battery power if necessary. This enables quicker unplugging of the peripheral device from the external host device and can allow the peripheral device to transition from a first mode into a second mode faster.
摘要翻译： 介绍了减少连接到外部主机设备的外设的卸载时间的技术。 而不是等待卸载过程来完成，指示卸载操作已经完成的回复消息被发送到外部主机设备。 这将触发来自外部主机设备的消息，外围设备准备好安全地删除。 在指示卸载操作已完成的应答消息发送到外部主机设备之后，外围设备完成卸载操作，包括缓存和内存清理。 必要时可以在电池电力下完成卸载操作。 这使得能够从外部主机设备更快地拔出外围设备，并且可以允许外围设备更快地从第一模式转换到第二模式。
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公开(公告)号：US07511646B2
公开(公告)日：2009-03-31
申请号：US11694693
申请日：2007-03-30
IPC分类号： H03M1/00
CPC分类号： G11C7/16 , G11C11/5642 , G11C27/005
摘要： A system and method, including computer software, for storing digital information uses multiple NAND flash memory cells. Each memory cell is adapted to receive charge during a write operation to an analog voltage that corresponds to a data value having a binary representation of more than 4 bits. An analog-to-digital converter converts the analog voltage from each memory cell into a digital representation of the analog voltage during a read operation of each cell.
摘要翻译： 包括用于存储数字信息的计算机软件的系统和方法使用多个NAND闪存单元。 每个存储单元适于在写入操作期间接收对应于具有大于4位的二进制表示的数据值的模拟电压的电荷。 在每个单元的读取操作期间，模数转换器将来自每个存储单元的模拟电压转换为模拟电压的数字表示。
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公开(公告)号：US20080270678A1
公开(公告)日：2008-10-30
申请号：US11739878
申请日：2007-04-25
IPC分类号： G06F13/00
CPC分类号： G06F13/1642 , G06F3/061 , G06F3/0659 , G06F3/0688
摘要： Systems and processes may include a memory coupled to a memory controller. Command signals for performing memory access operations may be received. Attributes of the command signals, such as type, time lapsed since receipt, and relatedness to other command signals, may be determined. Command signals may be sequenced in a sequence of execution based on the attributes. Command signals may be executed in the sequence of execution.
摘要翻译： 系统和过程可以包括耦合到存储器控制器的存储器。 可以接收用于执行存储器访问操作的命令信号。 可以确定命令信号的属性，例如类型，从接收到的时间，以及与其他命令信号的相关性。 命令信号可以基于属性在执行顺序中排序。 命令信号可以按执行顺序执行。
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公开(公告)号：US20070263455A1
公开(公告)日：2007-11-15
申请号：US11694742
申请日：2007-03-30
CPC分类号： G11C11/5628 , G11C2211/5621
摘要： Systems and methods, including computer software for writing to a memory device include applying charge to each of multiple memory cells for storage of a selected data value in each memory cell. The memory cells include a first reference memory cell, and each data value is selected from a group of possible data values. Each possible data value has a corresponding target voltage level, and the first reference memory cell has a corresponding predetermined first reference target voltage level. The voltage level in the first reference memory cell is detected. A determination is made whether the voltage level in the first reference memory cell is less than the first reference target voltage level. Additional charge is applied to the memory cells upon the determination that the voltage level in the first reference memory cell is less than the first reference target voltage.
摘要翻译： 包括用于写入存储器设备的计算机软件的系统和方法包括向多个存储器单元中的每一个应用电荷以存储每个存储器单元中的选定数据值。 存储器单元包括第一参考存储单元，并且从一组可能的数据值中选择每个数据值。 每个可能的数据值具有相应的目标电压电平，并且第一参考存储器单元具有对应的预定的第一参考目标电压电平。 检测第一参考存储单元中的电压电平。 确定第一参考存储单元中的电压电平是否小于第一参考目标电压电平。 在确定第一参考存储单元中的电压电平小于第一参考目标电压时，向存储器单元施加附加电荷。
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公开(公告)号：US20070263440A1
公开(公告)日：2007-11-15
申请号：US11694779
申请日：2007-03-30
IPC分类号： G11C16/04
CPC分类号： G11C11/5621 , G11C16/0483 , G11C16/3418 , G11C29/00 , G11C2211/5643
摘要： An electronic system includes a flash memory die having multiple flash memory cells. Each flash memory cell is operable to store at least four bits of data. A second die includes a controller for accessing the flash memory cells. DRAM is used by the controller to temporarily store data. An interface is operable to send and receive signals associated with the flash memory cells to a host. A housing contains the flash memory die, the second die, the DRAM, and the interface.
摘要翻译： 电子系统包括具有多个闪存单元的闪存芯片。 每个闪存单元可操作以存储至少四位的数据。 第二管芯包括用于访问闪存单元的控制器。 控制器使用DRAM临时存储数据。 接口可操作以向主机发送和接收与闪存单元相关联的信号。 壳体包含闪存管芯，第二管芯，DRAM和界面。
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公开(公告)号：US20070263439A1
公开(公告)日：2007-11-15
申请号：US11694712
申请日：2007-03-30
CPC分类号： G11C29/42 , G11C11/5628 , G11C11/5642 , G11C16/04 , G11C16/0483 , G11C16/349 , G11C29/00 , G11C29/028 , G11C29/50 , G11C29/50004 , G11C2211/5641
摘要： A system and method, including computer software, is used to write to a flash memory device that includes multiple memory cells. One or more of the memory cells are written at a first resolution corresponding to a first number of bits of data. A signal to write at a second resolution corresponding to a second number of bits of data is received. One or more of the memory cells are written at the second resolution.
摘要翻译： 使用包括计算机软件的系统和方法来写入包括多个存储器单元的闪存设备。 以与第一数据位数相对应的第一分辨率写入一个或多个存储器单元。 接收以对应于第二数量位数据的第二分辨率写入的信号。 以第二分辨率写入一个或多个存储器单元。
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公开(公告)号：US09063728B2
公开(公告)日：2015-06-23
申请号：US12726066
申请日：2010-03-17
申请人： Nir Wakrat , David J. Yeh , Christopher P. Dudte
发明人： Nir Wakrat , David J. Yeh , Christopher P. Dudte
CPC分类号： G06F1/3203 , G06F1/26 , G06F12/02
摘要： Systems and methods are disclosed for storing hibernation data in a non-volatile memory (“NVM”). Hibernation data is data stored in volatile memory that is lost during a reduced power event, but is needed to restore the device to the operational state it was in prior to entering into the reduced power event. When a reduced power event occurs, the hibernation data is stored in the NVM. When the device “wakes up” the hibernation data is retrieved and used to restore the device to its prior operational state.
摘要翻译： 公开了用于将休眠数据存储在非易失性存储器（“NVM”）中的系统和方法。 休眠数据是存储在易失性存储器中的数据，其在减少功率事件期间丢失，但是需要将设备恢复到进入降低功率事件之前的操作状态。 当发生功率减小事件时，休眠数据存储在NVM中。 当设备“唤醒”时，休眠数据将被检索并用于将设备恢复到其先前的操作状态。
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公开(公告)号：US20120260026A1
公开(公告)日：2012-10-11
申请号：US13453605
申请日：2012-04-23
IPC分类号： G06F12/02
CPC分类号： G06F13/1642 , G06F3/061 , G06F3/0659 , G06F3/0688
摘要： Systems and processes may include a memory coupled to a memory controller. Command signals for performing memory access operations may be received. Attributes of the command signals, such as type, time lapsed since receipt, and relatedness to other command signals, may be determined. Command signals may be sequenced in a sequence of execution based on the attributes. Command signals may be executed in the sequence of execution.
摘要翻译： 系统和过程可以包括耦合到存储器控制器的存储器。 可以接收用于执行存储器访问操作的命令信号。 可以确定命令信号的属性，例如类型，从接收到的时间，以及与其他命令信号的相关性。 命令信号可以基于属性在执行顺序中排序。 命令信号可以按执行顺序执行。
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公开(公告)号：US20120155174A1
公开(公告)日：2012-06-21
申请号：US13406122
申请日：2012-02-27
CPC分类号： G11C29/52 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/26 , G11C29/00 , G11C2211/5641
摘要： A system and method, including computer software, allows reading data from a flash memory cell. Voltages from a group of memory cells are detected. The group of memory cells have associated metadata for error detection, and each memory cell stores a voltage representing a data value selected from multiple possible data values. Each possible data value corresponds to one range of multiple non-overlapping ranges of analog voltages. Memory cells having uncertain data values are identified based on the detected voltages. Alternative data values for the memory cells having the uncertain data values are determined, and a combination of alternative data values is selected. An error detection test is performed using the metadata associated with the multiple memory cells and the selected combination of alternative data values.
摘要翻译： 包括计算机软件的系统和方法允许从闪存单元读取数据。 检测来自一组存储器单元的电压。 该组存储器单元具有用于错误检测的相关联的元数据，并且每个存储器单元存储表示从多个可能数据值中选择的数据值的电压。 每个可能的数据值对应于模拟电压的多个非重叠范围的一个范围。 基于检测到的电压来识别具有不确定数据值的存储单元。 确定具有不确定数据值的存储单元的替代数据值，并选择备选数据值的组合。 使用与多个存储器单元相关联的元数据和所选择的备选数据值的组合来执行错误检测测试。
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公开(公告)号：US08171318B2
公开(公告)日：2012-05-01
申请号：US12716153
申请日：2010-03-02
CPC分类号： G06F1/26 , Y10T307/406
摘要： Apparatus and associated systems, methods and computer program products relate to using information stored in a flash memory to adjust the operating voltage supplied to the flash memory. The voltage information indicates a minimum operating voltage at which to operate the flash memory device. In general, operating a flash memory device near a minimal operating voltage may substantially minimize power consumption. The minimum operating voltage for individual flash memory devices may vary from IC to IC, by manufacturing lot, and by manufacturer. In a product, the minimum operating voltage for a particular flash memory may be determined, for example, by a controller built-in to a flash memory reporting (automatically or in response to a query) the minimum operating voltage (e.g., 2.5 V, 3.15 V) to a memory controller or microprocessor. The stored voltage information may further include information to adjust the operating voltage based on temperature.
摘要翻译： 装置和相关系统，方法和计算机程序产品涉及使用存储在闪速存储器中的信息来调节提供给闪存的工作电压。 电压信息表示操作闪速存储器件的最小工作电压。 通常，在最小工作电压附近操作闪速存储器件可能基本上最小化功耗。 单个闪存设备的最小工作电压可能因IC到IC，制造批次和制造商而异。 在产品中，特定闪速存储器的最小工作电压可以例如由内置于闪存的控制器（自动或响应于查询）报告最小工作电压（例如，2.5V， 3.15 V）连接到存储器控制器或微处理器。 存储的电压信息还可以包括基于温度来调节工作电压的信息。
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