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41 条记录 (耗时 0.03 秒)

    Circuit structure and design structure for an optionally switchable on-chip slow wave transmission line band-stop filter and a method of manufacture
    11.
    发明授权
    Circuit structure and design structure for an optionally switchable on-chip slow wave transmission line band-stop filter and a method of manufacture 有权
    用于可选择切换的片上慢波传输线带阻滤波器的电路结构和设计结构以及制造方法

    公开(公告)号：US08106728B2

    公开(公告)日：2012-01-31

    申请号：US12424110

    申请日：2009-04-15

    申请人： Hanyi Ding ,  Kwan H. Lam ,  Guoan Wang ,  Wayne H. Woods, Jr.

    发明人： Hanyi Ding ,  Kwan H. Lam ,  Guoan Wang ,  Wayne H. Woods, Jr.

    IPC分类号： H01P3/08 ,  H01P1/203

    CPC分类号： H01P1/203 ,  Y10T29/49155

    摘要： The present invention generally relates to a circuit structure, design structure and method of manufacturing a circuit, and more specifically to a circuit structure and design structure for an on-chip slow wave transmission line band-stop filter and a method of manufacture. A structure includes an on-chip transmission line stub comprising a conditionally floating structure structured to provide increased capacitance to the on-chip transmission line stub when the conditionally floating structure is connected to ground.

    摘要翻译： 本发明一般涉及一种电路结构，电路制造的设计结构和方法，更具体地涉及用于片上慢波传输线带阻滤波器的电路结构和设计结构以及制造方法。 一种结构包括片上传输线短截线，其包括有条件浮动结构，其被构造为当有条件浮动结构连接到地时为片上传输线短截线提供增加的电容。

    Method, structure, and design structure for an impedance-optimized microstrip transmission line for multi-band and ultra-wide band applications
    14.
    发明授权
    Method, structure, and design structure for an impedance-optimized microstrip transmission line for multi-band and ultra-wide band applications 有权
    用于多频带和超宽带应用的阻抗优化微带传输线的方法，结构和设计结构

    公开(公告)号：US08164397B2

    公开(公告)日：2012-04-24

    申请号：US12542368

    申请日：2009-08-17

    申请人： Guoan Wang ,  Wayne H. Woods, Jr.

    发明人： Guoan Wang ,  Wayne H. Woods, Jr.

    IPC分类号： H03H7/38

    CPC分类号： H01P3/081 ,  H01P3/006

    摘要： A method, structure, and design structure for an impedance-optimized microstrip transmission line for multi-band and ultra-wide band applications. A method includes: forming a plurality of openings in a ground plane associated with a signal line; forming a plurality of capacitance plates in the plurality of openings; and connecting the plurality of capacitance plates to the signal line with a plurality of posts extending between the signal line and the plurality of capacitance plates.

    摘要翻译： 用于多频带和超宽带应用的阻抗优化微带传输线的方法，结构和设计结构。 一种方法包括：在与信号线相关联的接地平面中形成多个开口; 在所述多个开口中形成多个电容板; 以及在所述信号线与所述多个电容板之间延伸的多个支柱将所述多个电容板连接到所述信号线。

    ON-CHIP HIGH PERFORMANCE SLOW-WAVE COPLANAR WAVEGUIDE STRUCTURES, METHOD OF MANUFACTURE AND DESIGN STRUCTURE
    15.
    发明申请
    ON-CHIP HIGH PERFORMANCE SLOW-WAVE COPLANAR WAVEGUIDE STRUCTURES, METHOD OF MANUFACTURE AND DESIGN STRUCTURE 失效
    片上高性能慢波共晶波形结构，制造方法和设计结构

    公开(公告)号：US20120139667A1

    公开(公告)日：2012-06-07

    申请号：US12959997

    申请日：2010-12-03

    申请人： Essam MINA ,  Guoan Wang ,  Wayne H. Woods, JR.

    发明人： Essam MINA ,  Guoan Wang ,  Wayne H. Woods, JR.

    IPC分类号： H01P3/08

    CPC分类号： H01P3/081 ,  H01P3/003 ,  H01P9/00

    摘要： On-chip high performance slow-wave coplanar waveguide structures, method of manufacture and design structures for integrated circuits are provided herein. The structure includes at least one ground and signal layer provided in a same plane as the at least one ground. The signal layer has at least one alternating wide portion and narrow portion with an alternating thickness. The wide portion extends toward the at least one ground.

    摘要翻译： 本文提供片上高性能慢波共面波导结构，集成电路的制造方法和设计结构。 该结构包括设置在与至少一个地面相同的平面中的至少一个接地和信号层。 信号层具有至少一个交替宽的部分和具有交替厚度的窄部分。 宽部分朝向至少一个地面延伸。

    MILLIMETER-WAVE ON-CHIP SWITCH EMPLOYING FREQUENCY-DEPENDENT INDUCTANCE FOR CANCELLATION OF OFF-STATE CAPACITANCE
    16.
    发明申请
    MILLIMETER-WAVE ON-CHIP SWITCH EMPLOYING FREQUENCY-DEPENDENT INDUCTANCE FOR CANCELLATION OF OFF-STATE CAPACITANCE 有权
    采用离散电源的毫米波片式开关，用于取消非状态电容的频率依赖性电感

    公开(公告)号：US20120019313A1

    公开(公告)日：2012-01-26

    申请号：US12839777

    申请日：2010-07-20

    申请人： Wayne H. Woods, JR. ,  Guoan Wang ,  Hanyi Ding

    发明人： Wayne H. Woods, JR. ,  Guoan Wang ,  Hanyi Ding

    IPC分类号： H01P1/20

    CPC分类号： H01P1/127 ,  H01F17/0006 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/645 ,  H01L23/66 ,  H01L27/0629 ,  H01L28/10 ,  H01L2223/6627 ,  H01L2924/0002 ,  H03K17/145 ,  H01L2924/00

    摘要： A semiconductor switching device includes a field effect transistor and an inductor structure that provides a frequency dependent inductance in a parallel connection. During the off-state of the semiconductor switching device, the frequency dependent impedance component due to the off-state parasitic capacitance of the switching device is cancelled by the frequency dependent inductance component of the inductor structure, which provides a non-linear impedance as a function of frequency. The inductor structure provides less inductance at a higher operating frequency than at a lower operating frequency to provide more effective cancellation of two impedance components of the parasitic capacitance and the inductance. Thus, the semiconductor switching device can provide low parasitic coupling at multiple operating frequencies. The operating frequencies of the semiconductor switching device can be at gigahertz ranges for millimeter wave applications.

    摘要翻译： 半导体开关器件包括场效应晶体管和在并联连接中提供频率相关电感的电感器结构。 在半导体开关器件的截止状态期间，由开关器件的截止状态寄生电容引起的与频率相关的阻抗分量被电感器结构的频率相关的电感分量抵消，该电感器结构提供非线性阻抗作为 频率功能 电感器结构在较高工作频率下提供比在较低工作频率下更小的电感，以提供更有效地消除寄生电容和电感的两个阻抗分量。 因此，半导体开关器件可以在多个工作频率下提供低的寄生耦合。 对于毫米波应用，半导体开关器件的工作频率可以是千兆赫兹范围。

    Compact On-Chip Branchline Coupler Using Slow Wave Transmission Line
    17.
    发明申请
    Compact On-Chip Branchline Coupler Using Slow Wave Transmission Line 有权
    使用慢波传输线的紧凑型片上分支线耦合器

    公开(公告)号：US20110043299A1

    公开(公告)日：2011-02-24

    申请号：US12542958

    申请日：2009-08-18

    申请人： Hanyi Ding ,  Essam Mina ,  Guoan Wang ,  Wayne H. Woods, JR.

    发明人： Hanyi Ding ,  Essam Mina ,  Guoan Wang ,  Wayne H. Woods, JR.

    IPC分类号： H01P5/18 ,  H01P1/18

    CPC分类号： H01P3/082 ,  H01L27/0617 ,  H01L27/0629 ,  H01P5/227

    摘要： Branchline coupler structure using slow wave transmission line effect having both large inductance and large capacitance per unit length. The branchline coupler structure includes a plurality of quarter-wavelength transmission lines, at least one of which includes a high impedance arm and a low impedance arm. The high and low impedances are relative to each other. The high impedance arm includes a plurality of narrow cells and having an inductance of nL and a capacitance of C/n, and the low impedance arm includes a plurality of wide cells and having an inductance of L/n and capacitance of nC. The wide and narrow cells are relative to each other, and the wide and narrow cells are adjacent each other to form a signal layer having step discontinuous alternative widths.

    摘要翻译： 使用慢波传输线效应的分支线耦合器结构具有每单位长度的大电感和大电容。 支线耦合器结构包括多个四分之一波长传输线，其中至少一个包括高阻抗臂和低阻抗臂。 高阻抗和低阻抗是相对的。 高阻抗臂包括多个窄电池并且具有nL的电感和C / n的电容，并且低阻抗臂包括多个宽电池并且具有L / n的电感和nC的电容。 宽和窄的单元彼此相对，并且宽和窄的单元彼此相邻以形成具有阶梯不连续替代宽度的信号层。

    On-chip radial cavity power divider/combiner
    20.
    发明授权
    On-chip radial cavity power divider/combiner 有权
    片上径向腔功率分配器/组合器

    公开(公告)号：US08643191B2

    公开(公告)日：2014-02-04

    申请号：US13358792

    申请日：2012-01-26

    申请人： Hanyi Ding ,  Pinping Sun ,  Guoan Wang ,  Wayne H. Woods, Jr.

    发明人： Hanyi Ding ,  Pinping Sun ,  Guoan Wang ,  Wayne H. Woods, Jr.

    IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

    CPC分类号： H01L23/481 ,  H01L23/66 ,  H01L2224/16225 ,  H01L2924/1305 ,  H01L2924/15311 ,  H01L2924/00

    摘要： Disclosed is a chip with a power divider/combiner, a module incorporating the chip and associated methods. The divider/combiner comprises first and second metal layers on opposite sides of a substrate. Interconnects extend through the substrate and comprise: a first interconnect, second interconnects annularly arranged about the first interconnect and third interconnects annularly arranged about the second interconnects. Each interconnect comprises one or more through silicon vias lined/filled with a conductor. For a power divider, an opening in the first metal layer at the first interconnect comprises an input port for receiving power and openings in the first or second metal layer at the second interconnects comprise output ports for applying power to other devices. For a power combiner, openings in the first or second metal layer at the second interconnects comprise the input ports and an opening in the first metal layer at the first interconnect comprises an output port.

    摘要翻译： 公开了具有功率分配器/组合器的芯片，包括芯片的模块和相关联的方法。 分隔器/组合器包括在衬底的相对侧上的第一和第二金属层。 互连件延伸穿过衬底并且包括：第一互连，围绕第一互连环形布置的第二互连和围绕第二互连环形布置的第三互连。 每个互连包括一个或多个内衬/填充有导体的通孔硅通孔。 对于功率分配器，第一互连处的第一金属层中的开口包括用于接收功率的输入端口，并且在第二互连处的第一或第二金属层中的开口包括用于向其它器件施加电力的输出端口。 对于功率组合器，在第二互连处的第一或第二金属层中的开口包括输入端口，并且在第一互连处的第一金属层中的开口包括输出端口。