公开(公告)号：US20180331407A1

公开(公告)日：2018-11-15

申请号：US15777212

申请日：2016-10-25

Applicant: Furuno Electric Co., Ltd.

Inventor： Takehiro KISHIDA ,  Shuhei INOUE

IPC: H01P1/212 ,  H01P3/08 ,  H05K1/02 ,  H05K1/11 ,  G01S7/03

CPC classification number: H01P1/212 ,  G01S7/032 ,  H01P3/006 ,  H01P3/08 ,  H01P5/022 ,  H05K1/0216 ,  H05K1/115 ,  H05K2201/0195

Abstract: To provide a multilayer substrate for transmitting/receiving a high frequency signal, the substrate having a simplified configuration and excellent high frequency characteristics. This disclosure pertains to a multilayer substrate provided with: a plurality of dielectric layers laminated together with ground layers interposed therebetween; and a signal line for inputting and outputting a signal, the signal line being formed on the surface of the dielectric layer. The plurality of ground layers include an input-side ground layer part formed in the region on the signal-input side of the signal line, an output-side ground layer part formed in the region on the signal-output side of the signal line, and an intermediate ground layer part formed in the region between the input-side ground layer part and the output-side ground layer part. The input-side ground layer part and the output-side ground layer part each have fewer layers than the intermediate ground layer part.

公开(公告)号：US20180048044A1

公开(公告)日：2018-02-15

申请号：US15791225

申请日：2017-10-23

Applicant: QUALCOMM Incorporated

Inventor： Yu-Chin Ou ,  Mohammad Ali Tassoudji ,  Xiaoyin He ,  Vladimir Aparin

IPC: H01P3/00 ,  H05K1/02

CPC classification number: H01P3/003 ,  H01P3/006 ,  H05K1/0219 ,  H05K2201/09236 ,  H05K2201/09618

Abstract: A pair of stacked ground coplanar waveguides (GCPWs) is provided in two consecutive metal layers that are deposited on opposing surfaces of a dielectric layer. A first metal layer on a first side of the dielectric layer forms a first signal trace and an upper ground plane for a first GCPW in the pair. Similarly, a second metal layer on a second surface of the dielectric layer forms a second signal trace and an upper ground plane for a second GCPW in the pair.

公开(公告)号：US09867294B2

公开(公告)日：2018-01-09

申请号：US14720656

申请日：2015-05-22

Applicant: Nasser Ghassemi ,  Hugues Tournier

Inventor： Nasser Ghassemi ,  Hugues Tournier

IPC: H05K5/00 ,  H05K3/34 ,  H05K1/18 ,  H05K1/02 ,  H01P5/02 ,  H01P3/00

CPC classification number: H05K3/34 ,  H01P3/006 ,  H01P5/028 ,  H05K1/0237 ,  H05K1/18

Abstract: A waveguide. The waveguide may include a first waveguide region that includes a signal trace with a first width. The waveguide may further include a second waveguide region that includes the signal trace with a second width. The first width may be different from the second width. The signal trace may be configured to transmit an electrical signal. The signal trace with the second width may be configured to couple with an integrated circuit.

公开(公告)号：US20170373365A1

公开(公告)日：2017-12-28

申请号：US15194747

申请日：2016-06-28

Applicant: U.S.A. as represented by the Administrator of the National Aeronautics and Space Administration

Inventor： KONGPOP U-YEN ,  EDWARD J. WOLLACK ,  MARC CASTRO

IPC: H01P5/12

CPC classification number: H01P3/003 ,  H01P3/006 ,  H01P3/088 ,  H01P5/028

Abstract: A via-less crossover for use in broadband microwave/mm-wave circuitry, including: a dielectric substrate; a top layer disposed on one side of the substrate and including a microstrip line with an input and an output, two tapered sections placed around the microstrip line along a co-planar waveguide (CPW) central line, one microstrip portion having an input and which connects to one top layer, rectangular stub disposed adjacent to one of the tapered sections, and another microstrip portion having an output and which connects to another top layer, rectangular stub disposed adjacent to the other of the tapered sections; and a ground layer disposed on an opposite side of the substrate and including a bottom layer CPW central line situated in a central cutout and which connects between a bottom layer, rectangular stub on one side and a bottom layer, rectangular stub on the other side situated in ground cutouts, respectively.

公开(公告)号：US09705173B2

公开(公告)日：2017-07-11

申请号：US14602290

申请日：2015-01-22

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tzung-Lin Li ,  Chien-Yi Lee ,  Chieh-Pin Chang

IPC: H01P3/02 ,  H01P3/00 ,  H01P11/00 ,  H01P7/08

CPC classification number: H01P3/003 ,  H01P3/006 ,  H01P3/026 ,  H01P7/086 ,  H01P11/001

Abstract: A waveguide structure includes a signal line and two static lines. The signal line is disposed between the static lines in a first direction. The static lines and the signal line are disposed parallel to one another. Each static line includes a first conductive pattern, a second conductive pattern, and a third conductive pattern. The first conductive pattern and the signal line are disposed on an identical plane of a dielectric layer. A thickness of the first conductive pattern is substantially equal to a thickness of the signal line. The second conductive pattern is disposed on the first conductive pattern. A width of the first conductive pattern is larger than a width of the second conductive pattern in the first direction. The third conductive pattern is disposed on the second conductive pattern. A width of the third conductive pattern is larger than the width of the second conductive pattern.

公开(公告)号：US20170093005A1

公开(公告)日：2017-03-30

申请号：US14864679

申请日：2015-09-24

Applicant: QUALCOMM Incorporated

Inventor： Yu-Chin Ou ,  Mohammad Ali Tassoudji ,  Xiaoyin He ,  Vladimir Aparin

IPC: H01P3/08

CPC classification number: H01P3/003 ,  H01P3/006 ,  H05K1/0219 ,  H05K2201/09236 ,  H05K2201/09618

Abstract: A pair of stacked ground coplanar waveguides (GCPWs) is provided in two consecutive metal layers that are deposited on opposing surfaces of a dielectric layer. A first metal layer on a first side of the dielectric layer forms a first signal trace and an upper ground plane for a first GCPW in the pair. Similarly, a second metal layer on a second surface of the dielectric layer forms a second signal trace and an upper ground plane for a second GCPW in the pair.

公开(公告)号：US20160204031A1

公开(公告)日：2016-07-14

申请号：US15074130

申请日：2016-03-18

Applicant: STMicroelectronics SA

Inventor： Sylvain Joblot ,  Pierre Bar

IPC: H01L21/768 ,  H01L23/528 ,  H01L23/532 ,  H01L23/66

CPC classification number: H01L21/76898 ,  H01L21/76831 ,  H01L23/481 ,  H01L23/5222 ,  H01L23/528 ,  H01L23/53228 ,  H01L23/5329 ,  H01L23/66 ,  H01L2223/6616 ,  H01L2223/6627 ,  H01L2924/0002 ,  H01P3/003 ,  H01P3/006 ,  H01P11/003 ,  H01L2924/00

Abstract: In one embodiment there is disclosed a method for manufacturing an integrated circuit in a semiconductor substrate including through vias and a coplanar line, including the steps of: forming active components and a set of front metallization levels; simultaneously etching from the rear surface of the substrate a through via hole and a trench crossing the substrate through at least 50% of its height; coating with a conductive material the walls and the bottom of the hole and of the trench; and filling the hole and the trench with an insulating filling material; and forming a coplanar line extending on the rear surface of the substrate, in front of the trench and parallel thereto, so that the lateral conductors of the coplanar line are electrically connected to the conductive material coating the walls of the trench.

公开(公告)号：US20130249653A1

公开(公告)日：2013-09-26

申请号：US13821865

申请日：2011-09-08

Applicant: Philippe Ferrari ,  Gustavo Pamplona Rehder

Inventor： Philippe Ferrari ,  Gustavo Pamplona Rehder

IPC: H01P3/08

CPC classification number: H01P3/003 ,  H01P1/184 ,  H01P3/006

Abstract: The invention relates to a high-frequency transmission line including a central conductive strip (6) associated with at least one conductive shielding plane (4), wherein at least a portion of the space between the conductive plane and the conductive strip comprises a ferroelectric material (10).

Abstract translation: 本发明涉及包括与至少一个导电屏蔽平面（4）相关联的中心导电条（6）的高频传输线，其中导电平面与导电条之间的至少一部分空间包括铁电材料 （10）。

公开(公告)号：US08164397B2

公开(公告)日：2012-04-24

申请号：US12542368

申请日：2009-08-17

Applicant: Guoan Wang ,  Wayne H. Woods, Jr.

Inventor： Guoan Wang ,  Wayne H. Woods, Jr.

IPC: H03H7/38

CPC classification number: H01P3/081 ,  H01P3/006

Abstract: A method, structure, and design structure for an impedance-optimized microstrip transmission line for multi-band and ultra-wide band applications. A method includes: forming a plurality of openings in a ground plane associated with a signal line; forming a plurality of capacitance plates in the plurality of openings; and connecting the plurality of capacitance plates to the signal line with a plurality of posts extending between the signal line and the plurality of capacitance plates.

Abstract translation: 用于多频带和超宽带应用的阻抗优化微带传输线的方法，结构和设计结构。 一种方法包括：在与信号线相关联的接地平面中形成多个开口; 在所述多个开口中形成多个电容板; 以及在所述信号线与所述多个电容板之间延伸的多个支柱将所述多个电容板连接到所述信号线。

公开(公告)号：US20120061133A1

公开(公告)日：2012-03-15

申请号：US13157499

申请日：2011-06-10

Applicant: Satoshi MASUDA

Inventor： Satoshi MASUDA

IPC: H05K1/11

CPC classification number: H01L23/057 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49861 ,  H01L23/66 ,  H01L2223/6611 ,  H01L2223/6627 ,  H01L2223/6633 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/16152 ,  H01L2924/166 ,  H01L2924/167 ,  H01L2924/16787 ,  H01L2924/1903 ,  H01L2924/19033 ,  H01L2924/19039 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01P3/006 ,  H01P5/028 ,  H01L2924/00

Abstract: A high-frequency circuit package including a dielectric substrate; a signal line, a first ground conductor layer, a second ground conductor layer, and a frame-shaped dielectric layer formed on the dielectric substrate; a third ground conductor layer formed on the frame-shaped dielectric layer; a first recess formed in the frame-shaped dielectric layer and including a first surface and a second surface that are located above the first ground conductor layer and the second ground conductor layer and extend laterally at an oblique angle with respect to the length direction of the signal line; a first ground line formed on the first surface and electrically connecting the first ground conductor layer with the third ground conductor layer; and a second ground line formed on the second surface and electrically connecting the second ground conductor layer with the third ground conductor layer.

Abstract translation: 一种包括电介质基片的高频电路封装; 信号线，第一接地导体层，第二接地导体层和形成在电介质基板上的框状电介质层; 形成在所述框状电介质层上的第三接地导体层; 形成在所述框状电介质层中并且包括第一表面和第二表面的第一凹部，所述第一表面和第二表面位于所述第一接地导体层和所述第二接地导体层之上，并且相对于所述第一接地导体层的长度方向以倾斜角横向延伸 信号线 形成在所述第一表面上并将所述第一接地导体层与所述第三接地导体层电连接的第一接地线; 以及第二接地线，形成在所述第二表面上并将所述第二接地导体层与所述第三接地导体层电连接。