公开(公告)号：US09627611B2

公开(公告)日：2017-04-18

申请号：US13683418

申请日：2012-11-21

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Jun Liu ,  Kunal Parekh

IPC: H01L45/00 ,  H01L27/24

CPC classification number: H01L45/06 ,  H01L27/2427 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/143 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1683 ,  H01L45/1691

Abstract: In some embodiments, an integrated circuit includes narrow, vertically-extending pillars that fill openings formed in the integrated circuit. In some embodiments, the openings can contain phase change material to form a phase change memory cell. The openings occupied by the pillars can be defined using crossing lines of sacrificial material, e.g., spacers, that are formed on different vertical levels. The lines of material can be formed by deposition processes that allow the formation of very thin lines. Exposed material at the intersection of the lines is selectively removed to form the openings, which have dimensions determined by the widths of the lines. The openings can be filled, for example, with phase change material.

公开(公告)号：US09263095B2

公开(公告)日：2016-02-16

申请号：US13953495

申请日：2013-07-29

Applicant: Micron Technology, Inc.

Inventor： Kunal Parekh ,  David Hwang ,  Wen Kuei Huang ,  Kuo Chen Wang ,  Ching Kai Lin

IPC: H01L27/108 ,  G11C5/06 ,  G11C11/405 ,  H01L29/66 ,  H01L29/78 ,  G11C5/02 ,  H01L27/105

CPC classification number: G11C5/06 ,  G11C5/025 ,  G11C11/405 ,  H01L27/1052 ,  H01L27/108 ,  H01L27/10879 ,  H01L29/66666 ,  H01L29/7827 ,  H01L29/785

Abstract: A memory array having memory cells and methods of forming the same. The memory array may have a buried digit line formed in a first horizontal planar volume, a word line formed in a second horizontal planar volume above the first horizontal planar volume and storage devices formed on top of the vertical access devices, such as finFETs, in a third horizontal planar volume above the second horizontal planar volume. The memory array may have a 4F2 architecture, wherein each memory cell includes two vertical access devices, each coupled to a single storage device.