WAFER REGISTRATION AND OVERLAY MEASUREMENT SYSTEMS AND RELATED METHODS

    公开(公告)号:US20200075432A1

    公开(公告)日:2020-03-05

    申请号:US16122106

    申请日:2018-09-05

    Abstract: A method for measuring overlay between an interest level and a reference level of a wafer includes applying a magnetic field to a wafer, detecting at least one residual magnetic field emitted from at least one registration marker of a first set of registration markers within the wafer, responsive to the detected one or more residual magnetic fields, determining a location of the at least one registration marker of the first set registration markers, determining a location of at least one registration marker of a second set of registration markers, and responsive to the respective determined locations of the at least one registration marker of the first set of registration markers and the at least one registration marker of the second set of registration markers, calculating a positional offset between an interest level of the wafer and a reference level of the wafer. Related methods and systems are also disclosed.

    SEMICONDUCTOR DEVICES INCLUDING CONDUCTIVE LINES AND METHODS OF FORMING THE SEMICONDUCTOR DEVICES
    14.
    发明申请
    SEMICONDUCTOR DEVICES INCLUDING CONDUCTIVE LINES AND METHODS OF FORMING THE SEMICONDUCTOR DEVICES 有权
    包括导电线的半导体器件和形成半导体器件的方法

    公开(公告)号:US20170062324A1

    公开(公告)日:2017-03-02

    申请号:US14838768

    申请日:2015-08-28

    Abstract: A semiconductor device including conductive lines is disclosed. First conductive lines each comprise a first portion, a second portion, and an enlarged portion, the enlarged portion connecting the first portion and the second portion of the first conductive line. The semiconductor device includes second conductive lines, at least some of the second conductive lines disposed between a pair of the first conductive lines, each second conductive line including a larger cross-sectional area at an end portion of the second conductive line than at other portions thereof. The semiconductor device includes a pad on each of the first conductive lines and the second conductive lines, wherein the pad on each of the second conductive lines is on the end portion thereof and the pad on the each of the first conductive lines is on the enlarged portion thereof.

    Abstract translation: 公开了一种包括导线的半导体器件。 第一导电线各自包括第一部分,第二部分和扩大部分,所述扩大部分连接第一导电线的第一部分和第二部分。 半导体器件包括第二导线,至少一些第二导线设置在一对第一导线之间,每个第二导线在第二导线的端部处包括比在其它部分的截面积更大的截面积 其中。 所述半导体器件包括在所述第一导线和所述第二导线中的每一个上的焊盘,其中,所述第二导线中的每一个上的所述焊盘位于所述第二导线的端部上, 部分。

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