Apparatuses and methods including memory and operation of same

    公开(公告)号:US10134470B2

    公开(公告)日:2018-11-20

    申请号:US14932746

    申请日:2015-11-04

    Abstract: Disclosed herein is a memory cell. The memory cell may act both as a combined selector device and memory element. The memory cell may be programmed by applying write pulses having different polarities. Different polarities of the write pulses may program different logic states into the memory cell. The memory cell may be read by read pulses all having the same polarity. The logic state of the memory cell may be detected by observing different threshold voltages when the read pulses are applied. The different threshold voltages may be responsive to the different polarities of the write pulses.

    Apparatuses and methods including memory and operation of same

    公开(公告)号:US11615844B2

    公开(公告)日:2023-03-28

    申请号:US17443203

    申请日:2021-07-22

    Abstract: Disclosed herein is a memory cell. The memory cell may act both as a combined selector device and memory element. The memory cell may be programmed by applying write pulses having different polarities. Different polarities of the write pulses may program different logic states into the memory cell. The memory cell may be read by read pulses all having the same polarity. The logic state of the memory cell may be detected by observing different threshold voltages when the read pulses are applied. The different threshold voltages may be responsive to the different polarities of the write pulses.

    Apparatuses, devices and methods for sensing a snapback event in a circuit

    公开(公告)号:US11100991B2

    公开(公告)日:2021-08-24

    申请号:US16825259

    申请日:2020-03-20

    Abstract: Example subject matter disclosed herein relates to apparatuses and/or devices, and/or various methods for use therein, in which an application of an electric potential to a circuit may be initiated and subsequently changed in response to a determination that a snapback event has occurred in a circuit. For example, a circuit may comprise a memory cell that may experience a snapback event as a result of an applied electric potential. In certain example implementations, a sense circuit may be provided which is responsive to a snapback event occurring in a memory cell to generate a feed back signal to initiate a change in an electric potential applied to the memory cell.

    Apparatuses and methods including memory and operation of same

    公开(公告)号:US11074971B2

    公开(公告)日:2021-07-27

    申请号:US16455561

    申请日:2019-06-27

    Abstract: Disclosed herein is a memory cell. The memory cell may act both as a combined selector device and memory element. The memory cell may be programmed by applying write pulses having different polarities. Different polarities of the write pulses may program different logic states into the memory cell. The memory cell may be read by read pulses all having the same polarity. The logic state of the memory cell may be detected by observing different threshold voltages when the read pulses are applied. The different threshold voltages may be responsive to the different polarities of the write pulses.

    APPARATUSES, DEVICES AND METHODS FOR SENSING A SNAPBACK EVENT IN A CIRCUIT

    公开(公告)号:US20200219562A1

    公开(公告)日:2020-07-09

    申请号:US16825259

    申请日:2020-03-20

    Abstract: Example subject matter disclosed herein relates to apparatuses and/or devices, and/or various methods for use therein, in which an application of an electric potential to a circuit may be initiated and subsequently changed in response to a determination that a snapback event has occurred in a circuit. For example, a circuit may comprise a memory cell that may experience a snapback event as a result of an applied electric potential. In certain example implementations, a sense circuit may be provided which is responsive to a snapback event occurring in a memory cell to generate a feed back signal to initiate a change in an electric potential applied to the memory cell.

    Apparatuses and methods including memory and operation of same

    公开(公告)号:US10381077B2

    公开(公告)日:2019-08-13

    申请号:US16137950

    申请日:2018-09-21

    Abstract: Disclosed herein is a memory cell. The memory cell may act both as a combined selector device and memory element. The memory cell may be programmed by applying write pulses having different polarities. Different polarities of the write pulses may program different logic states into the memory cell. The memory cell may be read by read pulses all having the same polarity. The logic state of the memory cell may be detected by observing different threshold voltages when the read pulses are applied. The different threshold voltages may be responsive to the different polarities of the write pulses.

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