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公开(公告)号:US10134470B2
公开(公告)日:2018-11-20
申请号:US14932746
申请日:2015-11-04
Applicant: Micron Technology, Inc.
Inventor: Innocenzo Tortorelli , Stephen Tang , Christina Papagianni
Abstract: Disclosed herein is a memory cell. The memory cell may act both as a combined selector device and memory element. The memory cell may be programmed by applying write pulses having different polarities. Different polarities of the write pulses may program different logic states into the memory cell. The memory cell may be read by read pulses all having the same polarity. The logic state of the memory cell may be detected by observing different threshold voltages when the read pulses are applied. The different threshold voltages may be responsive to the different polarities of the write pulses.
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公开(公告)号:US20170358347A1
公开(公告)日:2017-12-14
申请号:US15664467
申请日:2017-07-31
Applicant: Micron Technology, Inc.
Inventor: Jeremy Miles Hirst , Hernan A. Castro , Stephen Tang
CPC classification number: G11C13/004 , G11C7/06 , G11C7/12 , G11C13/0004 , G11C13/0038 , G11C13/0059 , G11C13/0061 , G11C13/0069 , G11C2013/0083 , G11C2207/063
Abstract: Example subject matter disclosed herein relates to apparatuses and/or devices, and/or various methods for use therein, in which an application of an electric potential to a circuit may be initiated and subsequently changed in response to a determination that a snapback event has occurred in a circuit. For example, a circuit may comprise a memory cell that may experience a snapback event as a result of an applied electric potential. In certain example implementations, a sense circuit may be provided which is responsive to a snapback event occurring in a memory cell to generate a feed back signal to initiate a change in an electric potential applied to the memory cell.
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公开(公告)号:US11615844B2
公开(公告)日:2023-03-28
申请号:US17443203
申请日:2021-07-22
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Innocenzo Tortorelli , Stephen Tang , Christina Papagianni
Abstract: Disclosed herein is a memory cell. The memory cell may act both as a combined selector device and memory element. The memory cell may be programmed by applying write pulses having different polarities. Different polarities of the write pulses may program different logic states into the memory cell. The memory cell may be read by read pulses all having the same polarity. The logic state of the memory cell may be detected by observing different threshold voltages when the read pulses are applied. The different threshold voltages may be responsive to the different polarities of the write pulses.
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公开(公告)号:US11100991B2
公开(公告)日:2021-08-24
申请号:US16825259
申请日:2020-03-20
Applicant: Micron Technology, Inc.
Inventor: Jeremy Miles Hirst , Hernan A. Castro , Stephen Tang
Abstract: Example subject matter disclosed herein relates to apparatuses and/or devices, and/or various methods for use therein, in which an application of an electric potential to a circuit may be initiated and subsequently changed in response to a determination that a snapback event has occurred in a circuit. For example, a circuit may comprise a memory cell that may experience a snapback event as a result of an applied electric potential. In certain example implementations, a sense circuit may be provided which is responsive to a snapback event occurring in a memory cell to generate a feed back signal to initiate a change in an electric potential applied to the memory cell.
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公开(公告)号:US11074971B2
公开(公告)日:2021-07-27
申请号:US16455561
申请日:2019-06-27
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Innocenzo Tortorelli , Stephen Tang , Christina Papagianni
Abstract: Disclosed herein is a memory cell. The memory cell may act both as a combined selector device and memory element. The memory cell may be programmed by applying write pulses having different polarities. Different polarities of the write pulses may program different logic states into the memory cell. The memory cell may be read by read pulses all having the same polarity. The logic state of the memory cell may be detected by observing different threshold voltages when the read pulses are applied. The different threshold voltages may be responsive to the different polarities of the write pulses.
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公开(公告)号:US09747981B2
公开(公告)日:2017-08-29
申请号:US15177919
申请日:2016-06-09
Applicant: Micron Technology, Inc.
Inventor: Jeremy Hirst , Hernan Castro , Stephen Tang
CPC classification number: G11C13/004 , G11C7/06 , G11C7/12 , G11C13/0004 , G11C13/0038 , G11C13/0059 , G11C13/0061 , G11C13/0069 , G11C2013/0083 , G11C2207/063
Abstract: Example subject matter disclosed herein relates to apparatuses and/or devices, and/or various methods for use therein, in which an application of an electric potential to a circuit may be initiated and subsequently changed in response to a determination that a snapback event has occurred in a circuit. For example, a circuit may comprise a memory cell that may experience a snapback event as a result of an applied electric potential. In certain example implementations, a sense circuit may be provided which is responsive to a snapback event occurring in a memory cell to generate a feed back signal to initiate a change in an electric potential applied to the memory cell.
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公开(公告)号:US20170125097A1
公开(公告)日:2017-05-04
申请号:US14932746
申请日:2015-11-04
Applicant: Micron Technology, Inc.
Inventor: Innocenzo Tortorelli , Stephen Tang , Christina Papagianni
IPC: G11C13/00
CPC classification number: G11C13/0069 , G11C11/5678 , G11C13/0004 , G11C13/004 , G11C2013/005 , G11C2013/0052 , G11C2013/0073 , G11C2213/76 , G11C2213/77
Abstract: Disclosed herein is a memory cell. The memory cell may act both as a combined selector device and memory element. The memory cell may be programmed by applying write pulses having different polarities. Different polarities of the write pulses may program different logic states into the memory cell. The memory cell may be read by read pulses all having the same polarity. The logic state of the memory cell may be detected by observing different threshold voltages when the read pulses are applied. The different threshold voltages may be responsive to the different polarities of the write pulses.
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公开(公告)号:US20160365141A1
公开(公告)日:2016-12-15
申请号:US15177919
申请日:2016-06-09
Applicant: Micron Technology, Inc.
Inventor: Jeremy Hirst , Hernan Castro , Stephen Tang
IPC: G11C13/00
CPC classification number: G11C13/004 , G11C7/06 , G11C7/12 , G11C13/0004 , G11C13/0038 , G11C13/0059 , G11C13/0061 , G11C13/0069 , G11C2013/0083 , G11C2207/063
Abstract: Example subject matter disclosed herein relates to apparatuses and/or devices, and/or various methods for use therein, in which an application of an electric potential to a circuit may be initiated and subsequently changed in response to a determination that a snapback event has occurred in a circuit. For example, a circuit may comprise a memory cell that may experience a snapback event as a result of an applied electric potential. In certain example implementations, a sense circuit may be provided which is responsive to a snapback event occurring in a memory cell to generate a feed back signal to initiate a change in an electric potential applied to the memory cell.
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公开(公告)号:US20200219562A1
公开(公告)日:2020-07-09
申请号:US16825259
申请日:2020-03-20
Applicant: Micron Technology, Inc.
Inventor: Jeremy Miles Hirst , Hernan A. Castro , Stephen Tang
Abstract: Example subject matter disclosed herein relates to apparatuses and/or devices, and/or various methods for use therein, in which an application of an electric potential to a circuit may be initiated and subsequently changed in response to a determination that a snapback event has occurred in a circuit. For example, a circuit may comprise a memory cell that may experience a snapback event as a result of an applied electric potential. In certain example implementations, a sense circuit may be provided which is responsive to a snapback event occurring in a memory cell to generate a feed back signal to initiate a change in an electric potential applied to the memory cell.
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公开(公告)号:US10381077B2
公开(公告)日:2019-08-13
申请号:US16137950
申请日:2018-09-21
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Innocenzo Tortorelli , Stephen Tang , Christina Papagianni
Abstract: Disclosed herein is a memory cell. The memory cell may act both as a combined selector device and memory element. The memory cell may be programmed by applying write pulses having different polarities. Different polarities of the write pulses may program different logic states into the memory cell. The memory cell may be read by read pulses all having the same polarity. The logic state of the memory cell may be detected by observing different threshold voltages when the read pulses are applied. The different threshold voltages may be responsive to the different polarities of the write pulses.
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