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公开(公告)号:US11081173B2
公开(公告)日:2021-08-03
申请号:US16387183
申请日:2019-04-17
Applicant: Micron Technology, Inc.
Inventor: Stephen Tang
Abstract: Embodiments disclosed herein may relate to electrically conductive vias in cross-point memory array devices. In an embodiment, the vias may be formed using a lithographic operation also utilized to form electrically conductive lines in a first electrode layer of the cross-point memory array device.
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公开(公告)号:US20190325957A1
公开(公告)日:2019-10-24
申请号:US16455561
申请日:2019-06-27
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Innocenzo Tortorelli , Stephen Tang , Christina Papagianni
Abstract: Disclosed herein is a memory cell. The memory cell may act both as a combined selector device and memory element. The memory cell may be programmed by applying write pulses having different polarities. Different polarities of the write pulses may program different logic states into the memory cell. The memory cell may be read by read pulses all having the same polarity. The logic state of the memory cell may be detected by observing different threshold voltages when the read pulses are applied. The different threshold voltages may be responsive to the different polarities of the write pulses.
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公开(公告)号:US10418102B2
公开(公告)日:2019-09-17
申请号:US16137950
申请日:2018-09-21
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Innocenzo Tortorelli , Stephen Tang , Christina Papagianni
Abstract: Disclosed herein is a memory cell. The memory cell may act both as a combined selector device and memory element. The memory cell may be programmed by applying write pulses having different polarities. Different polarities of the write pulses may program different logic states into the memory cell. The memory cell may be read by read pulses all having the same polarity. The logic state of the memory cell may be detected by observing different threshold voltages when the read pulses are applied. The different threshold voltages may be responsive to the different polarities of the write pulses.
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公开(公告)号:US20190027218A1
公开(公告)日:2019-01-24
申请号:US16137950
申请日:2018-09-21
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Innocenzo Tortorelli , Stephen Tang , Christina Papagianni
Abstract: Disclosed herein is a memory cell. The memory cell may act both as a combined selector device and memory element. The memory cell may be programmed by applying write pulses having different polarities. Different polarities of the write pulses may program different logic states into the memory cell. The memory cell may be read by read pulses all having the same polarity. The logic state of the memory cell may be detected by observing different threshold voltages when the read pulses are applied. The different threshold voltages may be responsive to the different polarities of the write pulses.
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公开(公告)号:US10083745B2
公开(公告)日:2018-09-25
申请号:US15664467
申请日:2017-07-31
Applicant: Micron Technology, Inc.
Inventor: Jeremy Miles Hirst , Hernan A. Castro , Stephen Tang
CPC classification number: G11C13/004 , G11C7/06 , G11C7/12 , G11C13/0004 , G11C13/0038 , G11C13/0059 , G11C13/0061 , G11C13/0069 , G11C2013/0083 , G11C2207/063
Abstract: Example subject matter disclosed herein relates to apparatuses and/or devices, and/or various methods for use therein, in which an application of an electric potential to a circuit may be initiated and subsequently changed in response to a determination that a snapback event has occurred in a circuit. For example, a circuit may comprise a memory cell that may experience a snapback event as a result of an applied electric potential. In certain example implementations, a sense circuit may be provided which is responsive to a snapback event occurring in a memory cell to generate a feed back signal to initiate a change in an electric potential applied to the memory cell.
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公开(公告)号:US20130235655A1
公开(公告)日:2013-09-12
申请号:US13870434
申请日:2013-04-25
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Stephen Tang
CPC classification number: G11C13/0004 , G11C13/0002 , G11C13/003 , H01L23/481 , H01L23/528 , H01L27/101 , H01L27/2463 , H01L27/2481 , H01L27/249 , H01L45/06 , H01L45/1233 , H01L45/124 , H01L45/1253 , H01L45/1675 , H01L45/1683 , H01L2924/0002 , H01L2924/00
Abstract: Embodiments disclosed herein may relate to electrically conductive vias in cross-point memory array devices. In an embodiment, the vias may be formed using a lithographic operation also utilized to form electrically conductive lines in a first electrode layer of the cross-point memory array device.
Abstract translation: 本文公开的实施例可涉及交叉点存储器阵列器件中的导电通孔。 在一个实施例中,可以使用也用于在交叉点存储器阵列器件的第一电极层中形成导电线的光刻操作形成通孔。
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公开(公告)号:US20220013173A1
公开(公告)日:2022-01-13
申请号:US17443203
申请日:2021-07-22
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Innocenzo Tortorelli , Stephen Tang , Christina Papagianni
Abstract: Disclosed herein is a memory cell. The memory cell may act both as a combined selector device and memory element. The memory cell may be programmed by applying write pulses having different polarities. Different polarities of the write pulses may program different logic states into the memory cell. The memory cell may be read by read pulses all having the same polarity. The logic state of the memory cell may be detected by observing different threshold voltages when the read pulses are applied. The different threshold voltages may be responsive to the different polarities of the write pulses.
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公开(公告)号:US20190318780A1
公开(公告)日:2019-10-17
申请号:US16387183
申请日:2019-04-17
Applicant: Micron Technology, Inc.
Inventor: Stephen Tang
Abstract: Embodiments disclosed herein may relate to electrically conductive vias in cross-point memory array devices. In an embodiment, the vias may be formed using a lithographic operation also utilized to form electrically conductive lines in a first electrode layer of the cross-point memory array device.
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公开(公告)号:US10311947B2
公开(公告)日:2019-06-04
申请号:US15280238
申请日:2016-09-29
Applicant: Micron Technology, Inc.
Inventor: Stephen Tang
Abstract: Embodiments disclosed herein may relate to electrically conductive vias in cross-point memory array devices. In an embodiment, the vias may be formed using a lithographic operation also utilized to form electrically conductive lines in a first electrode layer of the cross-point memory array device.
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公开(公告)号:US20190013067A1
公开(公告)日:2019-01-10
申请号:US16128241
申请日:2018-09-11
Applicant: Micron Technology, Inc.
Inventor: Jeremy Miles Hirst , Hernan A. Castro , Stephen Tang
Abstract: Example subject matter disclosed herein relates to apparatuses and/or devices, and/or various methods for use therein, in which an application of an electric potential to a circuit may be initiated and subsequently changed in response to a determination that a snapback event has occurred in a circuit. For example, a circuit may comprise a memory cell that may experience a snapback event as a result of an applied electric potential. In certain example implementations, a sense circuit may be provided which is responsive to a snapback event occurring in a memory cell to generate a feed back signal to initiate a change in an electric potential applied to the memory cell.
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