-
公开(公告)号:US12034057B2
公开(公告)日:2024-07-09
申请号:US17496715
申请日:2021-10-07
Applicant: Micron Technology, Inc.
Inventor: Jordan D. Greenlee , Rita J. Klein , Everett A. McTeer , John Mark Meldrim
CPC classification number: H01L29/4966 , H10B41/27 , H10B43/27 , H10B41/10 , H10B43/10
Abstract: Some embodiments include a memory array having a vertical stack of alternating insulative levels and wordline levels. Channel material extends vertically along the stack. The wordline levels include conductive regions which have a first metal-containing material and a second metal-containing material. The first metal-containing material at least partially surrounds the second metal-containing material. The first metal-containing material has a different crystallinity than the second metal-containing material. In some embodiments the first metal-containing material is substantially amorphous, and the second metal-containing material has a mean grain size within a range of from greater than or equal to about 5 nm to less than or equal to about 200 nm. Charge-storage regions are adjacent the wordline levels. Charge-blocking regions are between the charge-storage regions and the conductive regions.
-
公开(公告)号:US20230255030A1
公开(公告)日:2023-08-10
申请号:US18126760
申请日:2023-03-27
Applicant: Micron Technology, Inc.
Inventor: Jivaan Kishore Jhothiraman , John Mark Meldrim
Abstract: A method used in forming integrated circuitry comprises forming a stack comprising vertically-alternating first tiers and second tiers. The stack comprises a cavity therein that comprises a stair-step structure. Sidewalls of the cavity and steps of the stair-step structure are lined with an insulator material. Insulative material is formed in the cavity radially inward of the insulator material. An upper portion of the insulative material is removed from the cavity to leave the insulative material in a bottom of the cavity over the stair-step structure. After the removing, insulating material is formed in the cavity above the insulative material. Other embodiments, including structure independent of method, are disclosed.
-
公开(公告)号:US10998481B2
公开(公告)日:2021-05-04
申请号:US16592425
申请日:2019-10-03
Applicant: Micron Technology, Inc.
Inventor: Yongjun Jeff Hu , John Mark Meldrim , Shanming Mou , Everett Allen McTeer
Abstract: A composition and method for formation of ohmic contacts on a semiconductor structure are provided. The composition includes a TiAlxNy material at least partially contiguous with the semiconductor structure. The TiAlxNy material can be TiAl3. The composition can include an aluminum material, the aluminum material being contiguous to at least part of the TiAlxNy material, such that the TiAlxNy material is between the aluminum material and the semiconductor structure. The method includes annealing the composition to form an ohmic contact on the semiconductor structure.
-
公开(公告)号:US10943921B2
公开(公告)日:2021-03-09
申请号:US16751116
申请日:2020-01-23
Applicant: Micron Technology, Inc.
Inventor: Jordan D. Greenlee , Chet E. Carter , Collin Howder , John Mark Meldrim , Everett A. McTeer
IPC: H01L27/11582 , H01L21/3213 , H01L29/10 , H01L21/768 , H01L23/532 , H01L21/285 , H01L23/528 , H01L27/11556 , H01L21/28 , H01L29/49 , H01L27/11519 , H01L27/11565
Abstract: Some embodiments include a method of forming an integrated structure. An assembly is formed to include a stack of alternating first and second levels. The first levels have insulative material, and the second levels have voids which extend horizontally. The assembly includes channel material structures extending through the stack. A first metal-containing material is deposited within the voids to partially fill the voids. The deposited first metal-containing material is etched to remove some of the first metal-containing material from within the partially-filled voids. Second metal-containing material is then deposited to fill the voids.
-
公开(公告)号:US20200328284A1
公开(公告)日:2020-10-15
申请号:US16383862
申请日:2019-04-15
Applicant: Micron Technology, Inc.
Inventor: Jordan D. Greenlee , Rita J. Klein , Everett A. McTeer , John Mark Meldrim
IPC: H01L29/49 , H01L27/11556 , H01L27/11582
Abstract: Some embodiments include a memory array having a vertical stack of alternating insulative levels and wordline levels. Channel material extends vertically along the stack. The wordline levels include conductive regions which have a first metal-containing material and a second metal-containing material. The first metal-containing material at least partially surrounds the second metal-containing material. The first metal-containing material has a different crystallinity than the second metal-containing material. In some embodiments the first metal-containing material is substantially amorphous, and the second metal-containing material has a mean grain size within a range of from greater than or equal to about 5 nm to less than or equal to about 200 nm. Charge-storage regions are adjacent the wordline levels. Charge-blocking regions are between the charge-storage regions and the conductive regions.
-
公开(公告)号:US10727250B2
公开(公告)日:2020-07-28
申请号:US16430713
申请日:2019-06-04
Applicant: Micron Technology, Inc.
Inventor: Jordan D. Greenlee , John Mark Meldrim , E. Allen McTeer
IPC: H01L27/11582 , H01L27/11556 , H01L27/11565
Abstract: A method used in forming an array of elevationally-extending transistors comprises forming vertically-alternating tiers of insulating material and void space. Such method includes forming (a) individual longitudinally-aligned channel openings extending elevationally through the insulating-material tiers, and (b) horizontally-elongated trenches extending elevationally through the insulating-material tiers. The void-space tiers are filled with conductive material by flowing the conductive material or one or more precursors thereof through at least one of (a) and (b) to into the void-space tiers. After the filling, transistor channel material is formed in the individual channel openings along the insulating-material tiers and along the conductive material in the filled void-space tiers.
-
公开(公告)号:US20200161332A1
公开(公告)日:2020-05-21
申请号:US16751116
申请日:2020-01-23
Applicant: Micron Technology, Inc.
Inventor: Jordan D. Greenlee , Chet E. Carter , Collin Howder , John Mark Meldrim , Everett A. McTeer
IPC: H01L27/11582 , H01L21/28 , H01L27/11556 , H01L23/528 , H01L21/768 , H01L21/285 , H01L23/532 , H01L29/10 , H01L21/3213
Abstract: Some embodiments include a method of forming an integrated structure. An assembly is formed to include a stack of alternating first and second levels. The first levels have insulative material, and the second levels have voids which extend horizontally. The assembly includes channel material structures extending through the stack. A first metal-containing material is deposited within the voids to partially fill the voids. The deposited first metal-containing material is etched to remove some of the first metal-containing material from within the partially-filled voids. Second metal-containing material is then deposited to fill the voids.
-
公开(公告)号:US20200035891A1
公开(公告)日:2020-01-30
申请号:US16592425
申请日:2019-10-03
Applicant: Micron Technology, Inc.
Inventor: Yongjun Jeff Hu , John Mark Meldrim , Shanming Mou , Everett Allen McTeer
Abstract: A composition and method for formation of ohmic contacts on a semiconductor structure are provided. The composition includes a TiAlxNy material at least partially contiguous with the semiconductor structure. The TiAlxNy material can be TiAl3. The composition can include an aluminum material, the aluminum material being contiguous to at least part of the TiAlxNy material, such that the TiAlxNy material is between the aluminum material and the semiconductor structure. The method includes annealing the composition to form an ohmic contact on the semiconductor structure.
-
19.
公开(公告)号:US20190189630A1
公开(公告)日:2019-06-20
申请号:US16186042
申请日:2018-11-09
Applicant: Micron Technology, Inc.
Inventor: Jordan D. Greenlee , John Mark Meldrim , Everett A. McTeer
IPC: H01L27/11556
CPC classification number: H01L27/11556 , H01L21/28518 , H01L21/28562 , H01L21/28568 , H01L27/11519 , H01L27/11565 , H01L27/11582
Abstract: Some embodiments include a method in which an assembly is formed to have voids within a stack, and to have slits adjacent the voids. Peripheral boundaries of the voids have proximal regions near the slits and distal regions adjacent the proximal regions. A material is deposited within the voids under conditions which cause the material to form to a greater thickness along the distal regions than along the proximal regions. Some embodiments include an assembly having a stack of alternating first and second levels. The second levels include conductive material. Panel structures extend through the stack. The conductive material within the second levels has outer edges with proximal regions near the panel structures and distal regions adjacent the proximal regions. Interface material is along the outer edges of the conductive material and has a different composition along the proximal regions than along the distal regions.
-
公开(公告)号:US10283524B1
公开(公告)日:2019-05-07
申请号:US15848612
申请日:2017-12-20
Applicant: Micron Technology, Inc.
Inventor: Jordan D. Greenlee , Chet E. Carter , Collin Howder , John Mark Meldrim , Everett A. McTeer
IPC: H01L21/28 , H01L29/10 , H01L29/49 , H01L21/285 , H01L21/768 , H01L23/528 , H01L23/532 , H01L21/3213 , H01L27/11519 , H01L27/11556 , H01L27/11565 , H01L27/11582
Abstract: Some embodiments include a method of forming an integrated structure. An assembly is formed to include a stack of alternating first and second levels. The first levels have insulative material, and the second levels have voids which extend horizontally. The assembly includes channel material structures extending through the stack. A first metal-containing material is deposited within the voids to partially fill the voids. The deposited first metal-containing material is etched to remove some of the first metal-containing material from within the partially-filled voids. Second metal-containing material is then deposited to fill the voids.
-
-
-
-
-
-
-
-
-