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公开(公告)号:US20190059162A1
公开(公告)日:2019-02-21
申请号:US16166204
申请日:2018-10-22
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yuki Takemori
Abstract: A ceramic electronic component that includes an electronic component body having a superficial base ceramic layer and a surface electrode on a surface of the electronic component body. The surface electrode includes a first sintered layer on the base ceramic layer, a second sintered layer on the first sintered layer, and a plating layer on the second sintered layer. A peripheral section of the first sintered layer has an exposed surface which is not overlaid with the second sintered layer or the plating layer.
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公开(公告)号:US20200315005A1
公开(公告)日:2020-10-01
申请号:US16903694
申请日:2020-06-17
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yuki Takemori
Abstract: A ceramic electronic component that includes an electronic component body having a superficial base ceramic layer; a surface electrode on a surface of the electronic component body, a peripheral section of the surface electrode having an opening therein; and a covering ceramic layer covering the peripheral section of the surface electrode and the opening therein.
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公开(公告)号:US20190069402A1
公开(公告)日:2019-02-28
申请号:US16174623
申请日:2018-10-30
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yuki Takemori
Abstract: A ceramic electronic component that includes an electronic component body having a superficial base ceramic layer, a surface electrode on a surface of the electronic component body, and a covering ceramic layer covering a peripheral section of the surface electrode. The peripheral section of the surface electrode that is covered by the covering ceramic layer has an opening or a thin portion.
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公开(公告)号:US20190069396A1
公开(公告)日:2019-02-28
申请号:US16170427
申请日:2018-10-25
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Takahiro Oka , Yoshitake Yamagami , Yuki Takemori , Kazuo Kishida , Hiromichi Kawakami
Abstract: A multilayer ceramic substrate according to the present invention includes a plurality of base layers that are laminated containing a low-temperature co-fired ceramic material, a plurality of first constraint layers which contain a metal oxide not completely sintered at the sintering temperature of the low-temperature co-fired ceramic material and which are located between the base layers, and a protective layer which contains the metal oxide and which is in contact with an outermost base layer of the plurality of base layers in the lamination direction, and wherein X1>X2, where X1 is a content of the metal oxide in a surface section of the protective layer and X2 is a content of the metal oxide in a boundary section of the protective layer that is in contact with the outermost base layer.
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公开(公告)号:US20190051458A1
公开(公告)日:2019-02-14
申请号:US16161313
申请日:2018-10-16
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Hiromichi Tanaka , Yuki Takemori
Abstract: A ceramic electronic component that includes a ceramic insulator and an inner conductor layer disposed in the ceramic insulator. The inner conductor layer contains a metal and a metal oxide containing at least one first metal element selected from Ti, Mg, and Zr, first insulator regions that contain at least one second metal element selected from Ti, Mg, and Zr and that are discontinuous from the ceramic insulator and present in a dispersed state in the inner conductor layer, and a second insulator region containing a third metal element the same as the second metal element contained in the first insulator regions and present around the inner conductor layer.
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公开(公告)号:US08980028B2
公开(公告)日:2015-03-17
申请号:US13630049
申请日:2012-09-28
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Yoichi Moriya , Tsuyoshi Katsube , Yuki Takemori , Tetsuo Kanamori , Yasutaka Sugimoto , Takahiro Takada
IPC: H01L23/15 , B32B18/00 , C04B35/117 , C04B35/16 , C04B35/195 , C04B37/02 , C23C24/08 , C23C28/04 , H01L23/14 , H01L23/498 , H05K1/05
CPC classification number: H01L23/15 , B32B18/00 , C04B35/117 , C04B35/16 , C04B35/195 , C04B37/021 , C04B37/025 , C04B2235/3203 , C04B2235/3206 , C04B2235/3208 , C04B2235/3215 , C04B2235/3217 , C04B2235/3262 , C04B2235/3409 , C04B2235/365 , C04B2235/6025 , C04B2235/652 , C04B2235/656 , C04B2235/6582 , C04B2235/77 , C04B2237/10 , C04B2237/341 , C04B2237/407 , C04B2237/56 , C04B2237/60 , C04B2237/704 , C04B2237/708 , C23C24/082 , C23C28/04 , H01L23/142 , H01L23/49822 , H01L23/49894 , H01L2224/16225 , H01L2224/48227 , H01L2224/73265 , H01L2924/09701 , H01L2924/15192 , H05K1/053 , Y10T156/10 , Y10T428/2495 , Y10T428/265
Abstract: In a metal base substrate with a low-temperature sintering ceramic layer located on a copper substrate, bonding reliability is increased between the copper substrate and the low-temperature sintering ceramic layer. A raw laminated body is prepared by stacking, on a surface of a copper substrate, a low-temperature sintering ceramic green layer including a low-temperature sintering ceramic material containing about 10 mol % to about 40 mol % of barium in terms of BaO and about 40 mol % to about 80 mol % of silicon in terms of SiO2, and this raw laminated body is subjected to firing at a temperature at which the low-temperature sintering ceramic green layer is sintered. In the thus obtained metal base substrate, a glass layer composed of Cu—Ba—Si based glass with a thickness of about 1 μm to about 5 μm is formed between the metal substrate and the low-temperature sintering ceramic layer.
Abstract translation: 在具有位于铜基板上的低温烧结陶瓷层的金属基底中,在铜基底和低温烧结陶瓷层之间的粘合可靠性提高。 通过在铜基材的表面上层叠包含以BaO换算含有约10mol%至约40mol%的钡的低温烧结陶瓷材料的低温烧结陶瓷生坯层来制备原料层压体,以及 约40mol%至约80mol%的SiO 2,并将该原料层压体在低温烧结陶瓷生坯层烧结的温度下进行烧制。 在这样得到的金属基底基板上,在金属基板和低温烧结陶瓷层之间形成厚度约1μm〜5μm的由Cu-Ba-Si系玻璃构成的玻璃层。
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