公开(公告)号：US07803675B2

公开(公告)日：2010-09-28

申请号：US11905511

申请日：2007-10-02

申请人： Sung-Dae Suk ,  Dong-Won Kim ,  Kyoung-Hwan Yeo

发明人： Sung-Dae Suk ,  Dong-Won Kim ,  Kyoung-Hwan Yeo

IPC分类号： H01L21/336

CPC分类号： H01L29/78696 ,  B82Y10/00 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/42392

摘要： The gate-all-around (GAA) type semiconductor device may include source/drain layers, a nanowire channel, a gate electrode and an insulation layer pattern. The source/drain layers may be disposed at a distance in a first direction on a semiconductor substrate. The nanowire channel may connect the source/drain layers. The gate electrode may extend in a second direction substantially perpendicular to the first direction. The gate electrode may have a height in a third direction substantially perpendicular to the first and second directions and may partially surround the nanowire channel. The insulation layer pattern may be formed between and around the source/drain layers on the semiconductor substrate and may cover the nanowire channel and a portion of the gate electrode. Thus, a size of the gate electrode may be reduced, and/or a gate induced drain leakage (GIDL) and/or a gate leakage current may be reduced.

公开(公告)号：US07788755B2

公开(公告)日：2010-09-07

申请号：US11465534

申请日：2006-08-18

申请人： Dong-Soo Lee ,  Dong-Won Kim

发明人： Dong-Soo Lee ,  Dong-Won Kim

IPC分类号： D06F35/00

CPC分类号： D06F37/22 ,  D06F37/203 ,  D06F2202/065

摘要： A method for sensing a type of an unbalance of a washing machine is provided. The method may include detecting a vibration amount of a tub using a multi-axis acceleration sensor; detecting a vibration amount of an rpm of a motor; and judging a type of an unbalance based on the vibration amount and the rpm vibration amount. The method may also include detecting a vibration amount of a tub at a plurality of positions of the tub using a plurality of multi-axis acceleration sensors; detecting a time difference of vibration occurrence at the plurality of positions, and thereby calculating a vibration phase difference; and judging a type of an unbalance based on the vibration amount detected at the plurality of positions and the vibration phase difference.

摘要翻译： 提供一种用于感测洗衣机的不平衡类型的方法。 该方法可以包括使用多轴加速度传感器检测桶的振动量; 检测电动机的转速的振动量; 以及基于振动量和转速振动量判断不平衡的类型。 该方法还可以包括使用多个多轴加速度传感器来检测桶的多个位置处的桶的振动量; 检测所述多个位置处的振动发生的时间差，从而计算振动相位差; 以及基于在多个位置处检测到的振动量和振动相位差来判断不平衡的类型。

公开(公告)号：US20100197094A1

公开(公告)日：2010-08-05

申请号：US12662083

申请日：2010-03-30

申请人： Sung-Min Kim ,  Min-Sang Kim ,  Ji-Myoung Lee ,  Dong-Won Kim

发明人： Sung-Min Kim ,  Min-Sang Kim ,  Ji-Myoung Lee ,  Dong-Won Kim

IPC分类号： H01L21/8238 ,  H01L21/8234

CPC分类号： H01L29/7856 ,  H01L29/4925 ,  H01L29/4958 ,  H01L29/66795

摘要： Provided are a FinFET and a method of manufacturing the same. A FinFET may include at least one active fin, at least one gate insulating layer pattern, a first electrode pattern, a second electrode pattern and at least one pair of source/drain expansion regions. The at least one active fin may be formed on a substrate. The at least one gate insulating layer pattern may be formed on the at least one active fin. The first electrode pattern may be formed on the at least one gate insulating layer pattern. Further, the first electrode pattern may be intersected with the at least one active fin. The second electrode pattern may be formed on the first electrode pattern. Further, the second electrode pattern may have a width greater than that of the first electrode pattern. The at least one pair of source/drain expansion regions may be formed on a surface of the at least one active fin on both sides of the first electrode pattern. Thus, the FinFET may have improved capacity and reduced GIDL current.

摘要翻译： 提供FinFET及其制造方法。 FinFET可以包括至少一个有源鳍片，至少一个栅极绝缘层图案，第一电极图案，第二电极图案和至少一对源极/漏极扩展区域。 所述至少一个活性翅片可以形成在基底上。 至少一个栅极绝缘层图案可以形成在至少一个活性鳍上。 第一电极图案可以形成在至少一个栅极绝缘层图案上。 此外，第一电极图案可以与至少一个活性鳍相交。 第二电极图案可以形成在第一电极图案上。 此外，第二电极图案可以具有大于第一电极图案的宽度的宽度。 至少一对源极/漏极扩展区域可以形成在第一电极图案的两侧上的至少一个有源鳍片的表面上。 因此，FinFET可能具有改进的容量和减小的GIDL电流。

公开(公告)号：US07723797B2

公开(公告)日：2010-05-25

申请号：US12230571

申请日：2008-09-02

申请人： Sung-Min Kim ,  Min-Sang Kim ,  Ji-Myoung Lee ,  Dong-Won Kim

发明人： Sung-Min Kim ,  Min-Sang Kim ,  Ji-Myoung Lee ,  Dong-Won Kim

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L29/7856 ,  H01L29/4925 ,  H01L29/4958 ,  H01L29/66795

摘要： Provided are a FinFET and a method of manufacturing the same. A FinFET may include at least one active fin, at least one gate insulating layer pattern, a first electrode pattern, a second electrode pattern and at least one pair of source/drain expansion regions. The at least one active fin may be formed on a substrate. The at least one gate insulating layer pattern may be formed on the at least one active fin. The first electrode pattern may be formed on the at least one gate insulating layer pattern. Further, the first electrode pattern may be intersected with the at least one active fin. The second electrode pattern may be formed on the first electrode pattern. Further, the second electrode pattern may have a width greater than that of the first electrode pattern. The at least one pair of source/drain expansion regions may be formed on a surface of the at least one active fin on both sides of the first electrode pattern. Thus, the FinFET may have improved capacity and reduced GIDL current.

公开(公告)号：US07715506B2

公开(公告)日：2010-05-11

申请号：US11409048

申请日：2006-04-24

申请人： Dong-Won Kim

发明人： Dong-Won Kim

IPC分类号： H03D1/04 ,  H04B17/00

CPC分类号： H04H40/18 ,  H03G3/3068 ,  H04B17/318

摘要： The present invention relates to a broadcast signal receiver comprising a low noise amplifier for receiving an RF signal and selectively amplifying the received RF signal; a tuner for tuning the RF signal selectively amplified by the low noise amplifier to a predetermined channel; a signal analyzer for demodulating a signal output from the tuner and calculating a signal-to-noise ratio of the demodulated signal; and a controller for determining the strength of the signal output from the tuner, and controlling a selective amplifying operation of the low noise amplifier on the basis of the determined signal strength and the signal-to-noise ratio. Thus, the present invention provides a broadcast signal receiver and a control method thereof, which prevents poor picture quality when the LNA is turned on due to the RF signal having a weak electric field.

摘要翻译： 广播信号接收机技术领域本发明涉及一种广播信号接收机，包括：低噪声放大器，用于接收RF信号并选择性地放大所接收的RF信号; 用于调谐由所述低噪声放大器选择放大的RF信号到预定信道的调谐器; 信号分析器，用于解调从调谐器输出的信号，并计算解调信号的信噪比; 以及控制器，用于确定从调谐器输出的信号的强度，并且基于所确定的信号强度和信噪比来控制低噪声放大器的选择性放大操作。 因此，本发明提供一种广播信号接收机及其控制方法，其能够防止由于具有弱电场的RF信号导致LNA导通时的劣质图像质量。

公开(公告)号：US20100035398A1

公开(公告)日：2010-02-11

申请号：US12588193

申请日：2009-10-07

申请人： Chang-Woo Oh ,  Dong-Gun Park ,  Dong-Won Kim ,  Dong-Uk Choi ,  Kyoung-Hwan Yeo

发明人： Chang-Woo Oh ,  Dong-Gun Park ,  Dong-Won Kim ,  Dong-Uk Choi ,  Kyoung-Hwan Yeo

IPC分类号： H01L21/336

CPC分类号： H01L29/0847 ,  H01L29/1054 ,  H01L29/665 ,  H01L29/66621 ,  H01L29/66636 ,  H01L29/66651 ,  H01L29/66795 ,  H01L29/7851 ,  H01L29/78687 ,  H01L29/7881

摘要： A field effect transistor (FET) and a method for manufacturing the same, in which the FET may include an isolation film formed on a semiconductor substrate to define an active region, and a gate electrode formed on a given portion of the semiconductor substrate. A channel layer may be formed on a portion of the gate electrode, with source and drain regions formed on either side of the channel layer so that boundaries between the channel layer and the source and drain regions of the FET may be perpendicular to a surface of the semiconductor substrate.

摘要翻译： 场效应晶体管（FET）及其制造方法，其中FET可以包括形成在半导体衬底上以形成有源区的隔离膜，以及形成在半导体衬底的给定部分上的栅电极。 沟道层可以形成在栅电极的一部分上，源极和漏极区形成在沟道层的任一侧上，使得沟道层与FET的源极和漏极区之间的边界可以垂直于 半导体衬底。

公开(公告)号：US07573739B2

公开(公告)日：2009-08-11

申请号：US11713770

申请日：2007-03-02

申请人： Eunjung Yun ,  Sung-Young Lee ,  Dong-Won Kim ,  Donggun Park

发明人： Eunjung Yun ,  Sung-Young Lee ,  Dong-Won Kim ,  Donggun Park

IPC分类号： G11C11/34

CPC分类号： G11C11/50 ,  G11C11/56 ,  G11C16/0475 ,  G11C23/00 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a memory device and a method of forming the same, in one embodiment, the memory device comprises a substrate and a bit line on the substrate extending in a first direction. A first word line structure is provided on the bit line and spaced apart from, and insulated from, the bit line, the first word line structure extending in a second direction transverse to the first direction. An electrode is coupled to the bit line extending over the first word line structure and spaced apart from the first word line structure by a first gap. A second word line structure is over the electrode and spaced apart from the electrode by a second gap, the second word line structure extending in the second direction. The electrode is cantilevered between the first word line structure and the second word line structure such that the electrode deflects to be electrically coupled with a top portion of the first word line structure through the first gap in a first bent position and deflects to be electrically coupled with a bottom portion of the second word line structure through the second gap in a second bent position, and is isolated from the first word line structure and the second word line structure in a rest position.

摘要翻译： 在存储器件及其形成方法中，在一个实施例中，存储器件包括衬底和在第一方向上延伸的衬底上的位线。 第一字线结构设置在位线上并且与位线隔开并绝缘，第一字线结构在横向于第一方向的第二方向上延伸。 电极耦合到在第一字线结构上延伸并且与第一字线结构隔开第一间隙的位线。 第二字线结构在电极之上并且与电极间隔开第二间隙，第二字线结构沿第二方向延伸。 电极在第一字线结构和第二字线结构之间是悬臂的，使得电极在第一弯曲位置通过第一间隙偏转以与第一字线结构的顶部电耦合，并且偏转以电耦合 第二字线结构的底部在第二弯曲位置通过第二间隙，并且在静止位置与第一字线结构和第二字线结构隔离。

公开(公告)号：US07511998B2

公开(公告)日：2009-03-31

申请号：US11803425

申请日：2007-05-15

申请人： Sung-Young Lee ,  Dong-Won Kim ,  Min-Sang Kim ,  Dong-Gun Park ,  Eun-Jung Yun

发明人： Sung-Young Lee ,  Dong-Won Kim ,  Min-Sang Kim ,  Dong-Gun Park ,  Eun-Jung Yun

IPC分类号： G11C16/04

CPC分类号： H01L27/101 ,  H01L27/24

摘要： A non-volatile memory device, and method of forming the same, increases or maximizes the performance of an ultramicro-structured device. In one embodiment, a non-volatile memory device comprises a first word line and a second word line insulated from each other and positioned to intersect each other with a vacant space therebetween; a bit line in the vacant space between one of the first word line and the second word line and positioned in parallel with one of the first word line and the second word line, the bit line constructed and arranged to be deflected toward one of the first word line and the second word line by an electric field induced between the first word line and the second word line; and a trap site between the bit line and one of the first word line and the second word line intersecting the bit line, the trap site being insulated from the one of the first word line and the second word line intersecting the bit line and spaced apart from the bit line by a portion of the vacant space, the trap site configured to trap a predetermined electric charge to electrostatically fix the bit line in a deflected position in the direction of the one of the word lines.

摘要翻译： 非易失性存储器件及其形成方法增加或最大化超微结构器件的性能。 在一个实施例中，非易失性存储器件包括第一字线和第二字线，该第一字线和第二字线彼此绝缘并且被定位成彼此相交并具有空隙; 位于第一字线和第二字线中的一个之间的空白空间中的位线，并且与第一字线和第二字线之一平行地定位，位线被构造和布置成朝向第一字线 字线和第二字线由在第一字线和第二字线之间感应的电场; 位线与位线相交的第一字线和第二字线之一之间的陷阱位置，陷阱位置与第一字线和第二字线之一绝缘，与位线相交并间隔开 从位线通过空闲空间的一部分，陷阱位置被配置为捕获预定电荷以将位线静电地固定在一条字线的方向上的偏转位置。

公开(公告)号：US07429504B2

公开(公告)日：2008-09-30

申请号：US11080737

申请日：2005-03-15

申请人： Sung-Min Kim ,  Kyoung-Hwan Yeo ,  In-Soo Jung ,  Si-Young Choi ,  Dong-Won Kim ,  Yong-Hoon Son ,  Young-Eun Lee ,  Byeong-Chan Lee ,  Jong-Wook Lee

发明人： Sung-Min Kim ,  Kyoung-Hwan Yeo ,  In-Soo Jung ,  Si-Young Choi ,  Dong-Won Kim ,  Yong-Hoon Son ,  Young-Eun Lee ,  Byeong-Chan Lee ,  Jong-Wook Lee

IPC分类号： H01L21/764 ,  H01L31/0336

CPC分类号： H01L29/0653 ,  H01L29/78

摘要： Embodiments of the present invention include heterogeneous substrates, integrated circuits formed on such heterogeneous substrates, and methods of forming such substrates and integrated circuits. The heterogeneous substrates according to certain embodiments of the present invention include a first Group IV semiconductor layer (e.g., silicon), a second Group IV pattern (e.g., a silicon-germanium pattern) that includes a plurality of individual elements on the first Group IV semiconductor layer, and a third Group IV semiconductor layer (e.g., a silicon epitaxial layer) on the second Group IV pattern and on a plurality of exposed portions of the first Group IV semiconductor layer. The second Group IV pattern may be removed in embodiments of the present invention. In these and other embodiments of the present invention, the third Group IV semiconductor layer may be planarized.

摘要翻译： 本发明的实施例包括异质衬底，在这种异质衬底上形成的集成电路，以及形成这种衬底和集成电路的方法。 根据本发明的某些实施方案的异质衬底包括第一组IV半导体层（例如，硅），第二组IV图案（例如硅 - 锗图案），其包括第一组IV上的多个单独元件 半导体层和第二组IV模式上的第三组IV半导体层（例如，硅外延层）和第一组IV半导体层的多个暴露部分上。 在本发明的实施例中可以去除第二组IV图案。 在本发明的这些和其它实施例中，第三组IV半导体层可以被平坦化。

公开(公告)号：US07297600B2

公开(公告)日：2007-11-20

申请号：US11020899

申请日：2004-12-23

申请人： Chang-Woo Oh ,  Dong-Gun Park ,  Dong-Won Kim ,  Yong-Kyu Lee

发明人： Chang-Woo Oh ,  Dong-Gun Park ,  Dong-Won Kim ,  Yong-Kyu Lee

IPC分类号： H01L21/336

CPC分类号： H01L29/7854 ,  B82Y10/00 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/66795 ,  H01L29/78645

摘要： A method of forming a fin field effect transistor on a semiconductor substrate includes forming a fin-shaped active region vertically protruding from the substrate. An oxide layer is formed on a top surface and opposing sidewalls of the fin-shaped active region. An oxidation barrier layer is formed on the opposing sidewalls of the fin-shaped active region and is planarized to a height no greater than about a height of the oxide layer to form a fin structure. The fin structure is oxidized to form a capping oxide layer on the top surface of the fin-shaped active region and to form at least one curved sidewall portion proximate the top surface of the fin-shaped active region. The oxidation barrier layer has a height sufficient to reduce oxidation on the sidewalls of the fin-shaped active region about halfway between the top surface and a base of the fin-shaped active region. Related devices are also discussed.

摘要翻译： 在半导体衬底上形成鳍状场效应晶体管的方法包括形成从衬底垂直突出的鳍状有源区。 在鳍状有源区的上表面和相对侧壁上形成氧化物层。 在翅片状有源区域的相对的侧壁上形成氧化阻挡层，并将其平坦化至不大于氧化物层高度的高度以形成翅片结构。 翅片结构被氧化以在翅片形有源区的顶表面上形成封盖氧化层，并且在翅片形有源区的顶表面附近形成至少一个弯曲的侧壁部分。 氧化阻挡层的高度足以减小翅片形有源区的侧壁上的氧化，大约在鳍状有源区的顶表面和基底之间的一半处。 还讨论了相关设备。