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公开(公告)号：US12073504B2
公开(公告)日：2024-08-27
申请号：US18137418
申请日：2023-04-20
Applicant: NVIDIA Corporation
Inventor： Gregory Muthler , John Burgess
CPC classification number: G06T15/06 , G06F9/5027 , G06T15/08 , G06T17/005 , G06T17/10 , G06T2210/12
Abstract: A bounding volume is used to approximate the space an object occupies. If a more precise understanding beyond an approximation is required, the object itself is then inspected to determine what space it occupies. Often, a simple volume (such as an axis-aligned box) is used as bounding volume to approximate the space occupied by an object. But objects can be arbitrary, complicated shapes. So a simple volume often does not fit the object very well. That causes a lot of space that is not occupied by the object to be included in the approximation of the space being occupied by the object. Hardware-based techniques are disclosed herein, for example, for efficiently using multiple bounding volumes (such as axis-aligned bounding boxes) to represent, in effect, an arbitrarily shaped bounding volume to better fit the object, and for using such arbitrary bounding volumes to improve performance in applications such as ray tracing.
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公开(公告)号：US11663770B2
公开(公告)日：2023-05-30
申请号：US17681168
申请日：2022-02-25
Applicant: NVIDIA Corporation
Inventor： Gregory Muthler , John Burgess
CPC classification number: G06T15/06 , G06F9/5027 , G06T15/08 , G06T17/005 , G06T17/10 , G06T2210/12
Abstract: A bounding volume is used to approximate the space an object occupies. If a more precise understanding beyond an approximation is required, the object itself is then inspected to determine what space it occupies. Often, a simple volume (such as an axis-aligned box) is used as bounding volume to approximate the space occupied by an object. But objects can be arbitrary, complicated shapes. So a simple volume often does not fit the object very well. That causes a lot of space that is not occupied by the object to be included in the approximation of the space being occupied by the object. Hardware-based techniques are disclosed herein, for example, for efficiently using multiple bounding volumes (such as axis-aligned bounding boxes) to represent, in effect, an arbitrarily shaped bounding volume to better fit the object, and for using such arbitrary bounding volumes to improve performance in applications such as ray tracing.
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公开(公告)号：US11189075B2
公开(公告)日：2021-11-30
申请号：US16893107
申请日：2020-06-04
Applicant: NVIDIA CORPORATION
Inventor： Samuli Laine , Timo Aila , Tero Karras , Gregory Muthler , William P. Newhall, Jr. , Ronald C. Babich, Jr. , Craig Kolb , Ignacio Llamas , John Burgess
Abstract: Methods and systems are described in some examples for changing the traversal of an acceleration data structure in a highly dynamic query-specific manner, with each query specifying test parameters, a test opcode and a mapping of test results to actions. In an example ray tracing implementation, traversal of a bounding volume hierarchy by a ray is performed with the default behavior of the traversal being changed in accordance with results of a test performed using the test opcode and test parameters specified in the ray data structure and another test parameter specified in a node of the bounding volume hierarchy. In an example implementation a traversal coprocessor is configured to perform the traversal of the bounding volume hierarchy.
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公开(公告)号：US11138009B2
公开(公告)日：2021-10-05
申请号：US16101247
申请日：2018-08-10
Applicant: NVIDIA Corporation
Inventor： Ronald Charles Babich, Jr. , John Burgess , Jack Choquette , Tero Karras , Samuli Laine , Ignacio Llamas , Gregory Muthler , William Parsons Newhall, Jr.
Abstract: Systems and methods for an efficient and robust multiprocessor-coprocessor interface that may be used between a streaming multiprocessor and an acceleration coprocessor in a GPU are provided. According to an example implementation, in order to perform an acceleration of a particular operation using the coprocessor, the multiprocessor: issues a series of write instructions to write input data for the operation into coprocessor-accessible storage locations, issues an operation instruction to cause the coprocessor to execute the particular operation; and then issues a series of read instructions to read result data of the operation from coprocessor-accessible storage locations to multiprocessor-accessible storage locations.
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公开(公告)号：US12198252B2
公开(公告)日：2025-01-14
申请号：US17946193
申请日：2022-09-16
Applicant: NVIDIA Corporation
Inventor： Gregory Muthler , John Burgess , Magnus Andersson , Ian Kwong , Edward Biddulph
Abstract: Techniques applicable to a ray tracing hardware accelerator for traversing a hierarchical acceleration structure with reduced false positive ray intersections are disclosed. The reduction of false positives may be based upon one or more of selectively performing a secondary higher precision intersection test for a bounding volume, identifying and culling bounding volumes that degenerate to a point, and parametrically clipping rays that exceed certain configured distance thresholds.
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Patent Agency Ranking
公开(公告)号：US12198251B2
公开(公告)日：2025-01-14
申请号：US17946093
申请日：2022-09-16
Applicant: NVIDIA Corporation
Inventor： Gregory Muthler , John Burgess , Magnus Andersson , Ian Kwong , Edward Biddulph
Abstract: Techniques applicable to a ray tracing hardware accelerator for traversing a hierarchical acceleration structure with reduced false positive ray intersections are disclosed. The reduction of false positives may be based upon one or more of selectively performing a secondary higher precision intersection test for a bounding volume, identifying and culling bounding volumes that degenerate to a point, and parametrically clipping rays that exceed certain configured distance thresholds.
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公开(公告)号：US11966737B2
公开(公告)日：2024-04-23
申请号：US17465234
申请日：2021-09-02
Applicant: NVIDIA Corporation
Inventor： Ronald Charles Babich, Jr. , John Burgess , Jack Choquette , Tero Karras , Samuli Laine , Ignacio Llamas , Gregory Muthler , William Parsons Newhall, Jr.
CPC classification number: G06F9/3004 , G06F9/3877 , G06F9/4843 , G06F15/163 , G06T1/20 , G06T1/60 , G06T2200/28
Abstract: Systems and methods for an efficient and robust multiprocessor-coprocessor interface that may be used between a streaming multiprocessor and an acceleration coprocessor in a GPU are provided. According to an example implementation, in order to perform an acceleration of a particular operation using the coprocessor, the multiprocessor: issues a series of write instructions to write input data for the operation into coprocessor-accessible storage locations, issues an operation instruction to cause the coprocessor to execute the particular operation; and then issues a series of read instructions to read result data of the operation from coprocessor-accessible storage locations to multiprocessor-accessible storage locations.
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公开(公告)号：US11854141B2
公开(公告)日：2023-12-26
申请号：US17968485
申请日：2022-10-18
Applicant: NVIDIA Corporation
Inventor： Gregory Muthler , John Burgess , Ronald Charles Babich, Jr. , William Parsons Newhall, Jr.
CPC classification number: G06T15/06 , G06F9/48 , G06F9/5027 , G06T17/10 , G06T2210/21
Abstract: Techniques are disclosed for improving the throughput of ray intersection or visibility queries performed by a ray tracing hardware accelerator. Throughput is improved, for example, by releasing allocated resources before ray visibility query results are reported by the hardware accelerator. The allocated resources are released when the ray visibility query results can be stored in a compressed format outside of the allocated resources. When reporting the ray visibility query results, the results are reconstructed based on the results stored in the compressed format. The compressed format storage can be used for ray visibility queries that return no intersections or terminate on any hit ray visibility query. One or more individual components of allocated resources can also be independently deallocated based on the type of data to be returned and/or results of the ray visibility query.
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公开(公告)号：US11804002B2
公开(公告)日：2023-10-31
申请号：US17689268
申请日：2022-03-08
Applicant: NVIDIA Corporation
Inventor： Gregory Muthler , John Burgess
CPC classification number: G06T15/06 , G06N3/02 , G06T15/005
Abstract: Ray tracing hardware accelerators supporting multiple specifiers for controlling the traversal of a ray tracing acceleration data structure are disclosed. For example, traversal efficiency and complex ray tracing effects can be achieved by specifying traversals through such data structures using both programmable ray operations and explicit node masking. The explicit node masking utilizes dedicated fields in the ray and in nodes of the acceleration data structure to control traversals. Ray operations, however, are programmable per ray using opcodes and additional parameters to control traversals. Traversal efficiency is improved by enabling more aggressive culling of parts of the data structure based on the combination of explicit node masking and programmable ray operations. More complex ray tracing effects are enabled by providing for dynamic selection of nodes based on individual ray characteristics.
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公开(公告)号：US11282261B2
公开(公告)日：2022-03-22
申请号：US16897745
申请日：2020-06-10
Applicant: NVIDIA Corporation
Inventor： Gregory Muthler , John Burgess , James Robertson , Magnus Andersson
Abstract: Enhanced techniques applicable to a ray tracing hardware accelerator for traversing a hierarchical acceleration structure are disclosed. The traversal efficiency of such hardware accelerators are improved, for example, by transforming a ray, in hardware, from the ray's coordinate space to two or more coordinate spaces at respective points in traversing the hierarchical acceleration structure. In one example, the hardware accelerator is configured to transform a ray, received from a processor, from the world space to at least one alternate world space and then to an object space in hardware before a corresponding ray-primitive intersection results are returned to the processor. The techniques disclosed herein facilitate the use of additional coordinate spaces to orient acceleration structures in a manner that more efficiently approximate the space occupied by the underlying primitives being ray-traced.
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