公开(公告)号：US06309926B1

公开(公告)日：2001-10-30

申请号：US09205211

申请日：1998-12-04

申请人： Scott A. Bell ,  Christopher F. Lyons ,  Harry J. Levinson ,  Khanh B. Nguyen ,  Fei Wang ,  Chih Yuh Yang

发明人： Scott A. Bell ,  Christopher F. Lyons ,  Harry J. Levinson ,  Khanh B. Nguyen ,  Fei Wang ,  Chih Yuh Yang

IPC分类号： H01L218242

CPC分类号： H01L27/11521 ,  H01L21/0274 ,  H01L21/31116 ,  H01L21/32136 ,  H01L21/32137 ,  H01L21/32139 ,  H01L27/115

摘要： A method of forming a gate structure is provided. In the method, a nitride layer is formed on a gate material layer. An ultra-thin photoresist layer is formed on the nitride layer. The ultra-thin photoresist layer is patterned with short wavelength radiation to define a pattern for the gate. The ultra-thin photoresist layer is used as a mask during a first etch step to transfer the gate pattern to the nitride layer. The first etch step includes an etch chemistry that is selective to the nitride layer over the ultra-thin photoresist layer. The nitride layer is used as a hard mask during a second etch step to form the gate by transferring the gate pattern to the gate material layer via the second etch step.

摘要翻译： 提供一种形成栅极结构的方法。 在该方法中，在栅极材料层上形成氮化物层。 在氮化物层上形成超薄的光致抗蚀剂层。 用短波长辐射对超薄光致抗蚀剂层进行构图，以限定栅极的图案。 在第一蚀刻步骤期间，将超薄光致抗蚀剂层用作掩模，以将栅极图案转移到氮化物层。 第一蚀刻步骤包括对超薄光致抗蚀剂层上的氮化物层有选择性的蚀刻化学品。 在第二蚀刻步骤期间，氮化物层用作硬掩模，以通过经由第二蚀刻步骤将栅极图案转移到栅极材料层来形成栅极。

公开(公告)号：US06207966B1

公开(公告)日：2001-03-27

申请号：US09205010

申请日：1998-12-04

申请人： Khanh B. Nguyen ,  Harry Levinson ,  Richard D. Edwards ,  Stuart Brown ,  Paul W. Ackmann

发明人： Khanh B. Nguyen ,  Harry Levinson ,  Richard D. Edwards ,  Stuart Brown ,  Paul W. Ackmann

IPC分类号： G01B1100

CPC分类号： G03F9/7076 ,  H01L23/544 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2924/0002 ,  H01L2924/00

摘要： An alignment mark protection structure (95) is disclosed which is used to ensure an integrity of an alignment scheme for a substrate (50) which is to be subjected to lithographic processing. The alignment mark protection structure (95) comprises the substrate (50) and an alignment mark (52) associated with the substrate (50). The alignment mark (52) reflects an alignment light (208) which is then used to determine an optimum alignment between the substrate (50) and a lithographic mask (214). A cap (100) overlies the alignment mark (52) and is substantially transparent with respect to the alignment light (208). The cap (100) protects the underlying alignment mark (52) from lithographic process-induced damage during processing and thus reduces alignment light noise, thereby improving the alignment between a mask (214) and the substrate (50) and minimizing the registration error associated with overlying layers formed on the substrate (50).

摘要翻译： 公开了一种对准标记保护结构（95），其用于确保待经受光刻处理的基板（50）的对准方案的完整性。 对准标记保护结构（95）包括衬底（50）和与衬底（50）相关联的对准标记（52）。 对准标记（52）反射对准光（208），然后将对准光（208）用于确定基板（50）和光刻掩模（214）之间的最佳对准。 盖（100）覆盖对准标记（52），并且相对于对准光（208）基本上是透明的。 盖（100）在处理期间保护下面的对准标记（52）免受光刻处理引起的损坏，从而减少对准光噪声，从而改善掩模（214）和基板（50）之间的对准并使与之相关联的注册误差最小化 其中覆盖层形成在基底（50）上。

公开(公告)号：US06165695A

公开(公告)日：2000-12-26

申请号：US203150

申请日：1998-12-01

申请人： Chih Yuh Yang ,  Christopher F. Lyons ,  Harry J. Levinson ,  Khanh B. Nguyen ,  Fei Wang ,  Scott A. Bell

发明人： Chih Yuh Yang ,  Christopher F. Lyons ,  Harry J. Levinson ,  Khanh B. Nguyen ,  Fei Wang ,  Scott A. Bell

IPC分类号： H01L21/027 ,  H01L21/033 ,  H01L21/311 ,  H01L21/768 ,  G03C5/00

CPC分类号： H01L21/31144 ,  H01L21/0276 ,  H01L21/0332 ,  H01L21/0338 ,  H01L21/76816 ,  Y10S430/168

摘要： A method of forming a via structure is provided. In the method, a dielectric layer is formed on an anti-reflective coating (ARC) layer covering a first metal layer; and an amorphous silicon layer is formed on the dielectric layer. An ultra-thin photoresist layer is formed on the amorphous silicon layer, and the ultra-thin photoresist layer is patterned with short wavelength radiation to define a pattern for a via. The patterned ultra-thin photoresist layer is used as a mask during a first etch step to transfer the via pattern to the amorphous silicon layer. The first etch step includes an etch chemistry that is selective to the amorphous silicon layer over the ultra-thin photoresist layer and the dielectric layer. The amorphous silicon layer is employed as a hard mask during a second etch step to form a contact hole corresponding to the via pattern by etching portions of the dielectric layer.

摘要翻译： 提供一种形成通孔结构的方法。 在该方法中，在覆盖第一金属层的抗反射涂层（ARC）层上形成电介质层; 并且在该电介质层上形成非晶硅层。 在非晶硅层上形成超薄光致抗蚀剂层，并用短波长辐射对超薄光致抗蚀剂层进行构图，以限定通孔的图案。 在第一蚀刻步骤期间，将图案化超薄光致抗蚀剂层用作掩模，以将通孔图案转印到非晶硅层。 第一蚀刻步骤包括对超薄光致抗蚀剂层和介电层上的非晶硅层有选择性的蚀刻化学品。 在第二蚀刻步骤期间，非晶硅层用作硬掩模，以通过蚀刻介电层的部分形成对应于通孔图案的接触孔。

公开(公告)号：US6013399A

公开(公告)日：2000-01-11

申请号：US205958

申请日：1998-12-04

申请人： Khanh B. Nguyen

发明人： Khanh B. Nguyen

IPC分类号： G03F1/24 ,  G03F9/00

CPC分类号： G03F1/24 ,  B82Y10/00 ,  B82Y40/00

摘要： A reworkable EUV mask (100) includes a substrate (40), a reflective layer (42) overlying the substrate (40), and a buffer layer (44) overlying the reflective layer (42). An absorbing layer (102) composed of primarily a non-heavy metal material overlies the buffer layer (44) for absorbing radiation which is incident thereon. The absorbing layer (102) exhibits a substantially high etch selectivity with respect to the reflective layer (42) and thus is easily removed without substantially impacting the reflectivity of the reflective layer (42) during rework.

摘要翻译： 可再加工的EUV掩模（100）包括衬底（40），覆盖衬底（40）的反射层（42）和覆盖在反射层（42）上的缓冲层（44）。 由主要由非重金属材料组成的吸收层（102）覆盖缓冲层（44），用于吸收入射在其上的辐射。 吸收层（102）相对于反射层（42）显示出相当高的蚀刻选择性，因此在返工期间不会基本上影响反射层（42）的反射率而容易地去除。

公开(公告)号：US06492067B1

公开(公告)日：2002-12-10

申请号：US09454674

申请日：1999-12-03

申请人： Leonard E. Klebanoff ,  Daniel J. Rader ,  Scott D. Hector ,  Khanh B. Nguyen ,  Richard H. Stulen

发明人： Leonard E. Klebanoff ,  Daniel J. Rader ,  Scott D. Hector ,  Khanh B. Nguyen ,  Richard H. Stulen

IPC分类号： G03F900

CPC分类号： G03F1/64 ,  G03F7/70983

摘要： A removable pellicle for a lithographic mask that provides active and robust particle protection, and which utilizes a traditional pellicle and two deployments of thermophoretic protection to keep particles off the mask. The removable pellicle is removably attached via a retaining structure to the mask substrate by magnetic attraction with either contacting or non-contacting magnetic capture mechanisms. The pellicle retaining structural is composed of an anchor piece secured to the mask substrate and a frame member containing a pellicle. The anchor piece and the frame member are in removable contact or non-contact by the magnetic capture or latching mechanism. In one embodiment, the frame member is retained in a floating (non-contact) relation to the anchor piece by magnetic levitation. The frame member and the anchor piece are provided with thermophoretic fins which are interdigitated to prevent particles from reaching the patterned area of the mask. Also, the anchor piece and mask are maintained at a higher temperature than the frame member and pellicle which also prevents particles from reaching the patterned mask area by thermophoresis. The pellicle can be positioned over the mask to provide particle protection during mask handling, inspection, and pumpdown, but which can be removed manually or robotically for lithographic use of the mask.

摘要翻译： 用于光刻掩模的可移除防护薄膜，其提供有效和坚固的颗粒保护，并且其利用传统的防护薄膜和两个部署热保护性保护以将颗粒保持在掩模上。 通过接触或非接触磁捕获机构的磁吸引，可除去的防护薄膜组件通过保持结构可拆卸地附接到掩模基板。 防护薄膜保持结构由固定到掩模基板的锚固件和包含防护薄膜的框架构件组成。 锚固件和框架构件通过磁捕获或锁定机构可拆卸地接触或非接触。 在一个实施例中，框架构件通过磁悬浮保持与锚固件的浮动（非接触）关系。 框架构件和锚固件设置有散热鳍片，其被交错以防止颗粒到达掩模的图案化区域。 此外，锚固件和掩模保持在比框架构件和防护薄膜更高的温度，其也通过热泳来防止颗粒到达图案化掩模区域。 防护薄膜组件可以位于掩模上方，以在掩模处理，检查和抽吸期间提供颗粒保护，但是可以手动或机器人地去除防护薄膜以用于掩模的光刻使用。

公开(公告)号：US06440640B1

公开(公告)日：2002-08-27

申请号：US09703092

申请日：2000-10-31

申请人： Chih Yuh Yang ,  Christopher F. Lyons ,  Harry J. Levinson ,  Khanh B. Nguyen ,  Fei Wang ,  Scott A. Bell

发明人： Chih Yuh Yang ,  Christopher F. Lyons ,  Harry J. Levinson ,  Khanh B. Nguyen ,  Fei Wang ,  Scott A. Bell

IPC分类号： G03C500

CPC分类号： H01L21/76816 ,  H01L21/0276 ,  H01L21/0332 ,  H01L21/0338 ,  H01L21/32139

摘要： A method of forming a via structure is provided. In the method, a dielectric layer is formed on an anti-reflective coating (ARC) layer covering a first metal layer; and a transition metal layer is formed on the dielectric layer. An ultra-thin photoresist layer is formed on the transition metal layer, and the ultra-thin photoresist layer is patterned with short wavelength radiation to define a pattern for a via. The patterned ultra-thin photoresist layer is used as a mask during a first etch step to transfer the via pattern to the transition metal layer. The first etch step includes an etch chemistry that is selective to the transition metal layer over the ultra-thin photoresist layer and the dielectric layer. The transition metal layer is employed as a hard mask during a second etch step to form a contact hole corresponding to the via pattern by etching portions of the dielectric layer.

摘要翻译： 提供一种形成通孔结构的方法。 在该方法中，在覆盖第一金属层的抗反射涂层（ARC）层上形成电介质层; 并且在介电层上形成过渡金属层。 在过渡金属层上形成超薄光致抗蚀剂层，并用短波长辐射对超薄光致抗蚀剂层进行构图，以形成通孔图案。 在第一蚀刻步骤期间，将图案化超薄光致抗蚀剂层用作掩模，以将通孔图案转印到过渡金属层。 第一蚀刻步骤包括对超薄光致抗蚀剂层和电介质层上的过渡金属层有选择性的蚀刻化学品。 在第二蚀刻步骤期间，过渡金属层用作硬掩模，以通过蚀刻介电层的部分形成与通孔图案相对应的接触孔。

公开(公告)号：US06316277B1

公开(公告)日：2001-11-13

申请号：US09580612

申请日：2000-05-30

申请人： Khoi A. Phan ,  Christopher F. Lyons ,  Khanh B. Nguyen ,  Jeff Schefske

发明人： Khoi A. Phan ,  Christopher F. Lyons ,  Khanh B. Nguyen ,  Jeff Schefske

IPC分类号： H01L2166

CPC分类号： H01L22/24

摘要： There is provided a method for enhancing the contrast between oxide film and ultra-thin resists in deep-ultraviolet lithography for use with a wafer defect inspection system in order to maximize defect inspection sensitivity. This is achieved by varying the thickness of the oxide film for a given ultra-thin resist thickness so as to produce a high contrast. As a result, defect inspection of the ultra-thin resist pattern is easily obtained. In a second embodiment, the ultra-thin resist thickness is varied for a given oxide film thickness. In a third embodiment, both the oxide film and the ultra-thin resist thicknesses are varied simultaneously so as to obtain an optimum contrast.

摘要翻译： 提供了一种用于在深紫外线光刻中增强氧化膜和超薄抗蚀剂之间的对比度以与晶片缺陷检查系统一起使用以便最大化缺陷检查灵敏度的方法。 这是通过改变给定的超薄抗蚀剂厚度的氧化膜的厚度来实现的，以产生高对比度。 结果，容易获得超薄抗蚀剂图案的缺陷检查。 在第二实施例中，对于给定的氧化膜厚度，超薄抗蚀剂厚度是变化的。 在第三实施例中，氧化膜和超薄抗蚀剂厚度同时变化，以获得最佳对比度。

公开(公告)号：US06200907B1

公开(公告)日：2001-03-13

申请号：US09204216

申请日：1998-12-02

申请人： Fei Wang ,  Christopher F. Lyons ,  Khanh B. Nguyen ,  Scott A. Bell ,  Harry J. Levinson ,  Chih Yuh Yang

发明人： Fei Wang ,  Christopher F. Lyons ,  Khanh B. Nguyen ,  Scott A. Bell ,  Harry J. Levinson ,  Chih Yuh Yang

IPC分类号： H01L21302

CPC分类号： H01L21/32139 ,  H01L21/0275 ,  H01L21/0332 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/76838

摘要： In one embodiment, the present invention relates to a method of forming a metal line, involving the steps of providing a semiconductor substrate comprising a metal layer, an oxide layer over the metal layer, and a barrier metal layer over the oxide layer; depositing an ultra-thin photoresist over the barrier metal layer, the ultra-thin photoresist having a thickness less than about 2,000 Å; irradiating the ultra-thin photoresist with electromagnetic radiation having a wavelength of about 250 nm or less; developing the ultra-thin photoresist exposing a portion of the barrier metal layer; etching the exposed portion of the barrier metal layer exposing a portion of the oxide layer; etching the exposed portion of the oxide layer exposing a portion of the metal layer; and etching the exposed portion of the metal layer thereby forming the metal line.

摘要翻译： 在一个实施例中，本发明涉及一种形成金属线的方法，包括以下步骤：提供包括金属层的半导体衬底，金属层上的氧化物层和氧化物层上的阻挡金属层; 在阻挡金属层上沉积超薄光致抗蚀剂，超薄光致抗蚀剂具有小于约的厚度; 用波长约250nm或更小的电磁辐射照射超薄光致抗蚀剂; 显影暴露一部分阻挡金属层的超薄光刻胶; 蚀刻暴露部分氧化物层的阻挡金属层的暴露部分; 蚀刻暴露出金属层的一部分的氧化物层的暴露部分; 并且蚀刻金属层的暴露部分从而形成金属线。

公开(公告)号：US06184128B2

公开(公告)日：2001-02-06

申请号：US09497222

申请日：2000-01-31

申请人： Fei Wang ,  Christopher F. Lyons ,  Khanh B. Nguyen ,  Scott A. Bell ,  Harry J. Levinson ,  Chih Yuh Yang

发明人： Fei Wang ,  Christopher F. Lyons ,  Khanh B. Nguyen ,  Scott A. Bell ,  Harry J. Levinson ,  Chih Yuh Yang

IPC分类号： H01L214763

CPC分类号： H01L21/7681 ,  H01L21/31144

摘要： In one embodiment, the present invention relates to a dual damascene method involving the steps of providing a substrate having a first low k material layer; forming a first hard mask layer over the first low k material layer; patterning a first opening having a first width in the first hard mask layer using a first photoresist thereby exposing a portion of the first low k material layer; removing the first photoresist; depositing a second low k material layer over the patterned first hard mask layer and the exposed portion of the first low k material layer; forming a second hard mask layer over the second low k material layer; patterning a second opening having a width larger than the first width in the second hard mask layer using a second photoresist thereby exposing a portion of the second low k material layer; anisotropically etching the exposed portions of the first and second low k material layers; and removing the second photoresist, wherein and at least one of the first photoresist and the second photoresist have a thickness of about 1,500 Å or less.

摘要翻译： 在一个实施例中，本发明涉及一种双镶嵌方法，包括以下步骤：提供具有第一低k材料层的基底; 在所述第一低k材料层上形成第一硬掩模层; 使用第一光致抗蚀剂构图在第一硬掩模层中具有第一宽度的第一开口，从而暴露第一低k材料层的一部分; 去除第一光致抗蚀剂; 在图案化的第一硬掩模层和第一低k材料层的暴露部分上沉积第二低k材料层; 在所述第二低k材料层上形成第二硬掩模层; 使用第二光致抗蚀剂构图在第二硬掩模层中形成具有大于第一宽度的宽度的第二开口，从而暴露第二低k材料层的一部分; 各向异性地蚀刻第一和第二低k材料层的暴露部分; 并且去除所述第二光致抗蚀剂，其中所述第一光致抗蚀剂和所述第二光致抗蚀剂中的至少一个具有大约等于或小于1500埃的厚度。

公开(公告)号：US06178221B1

公开(公告)日：2001-01-23

申请号：US09205790

申请日：1998-12-04

申请人： Harry Levinson ,  Khanh B. Nguyen

发明人： Harry Levinson ,  Khanh B. Nguyen

IPC分类号： G21K500

CPC分类号： G03F7/70283 ,  B82Y10/00 ,  B82Y40/00 ,  G03F1/24 ,  G03F7/70233

摘要： A reflective lithography mask (12) including a substrate (40); a reflective coating (42); a plurality of absorbing blocks (44) covering certain regions of the reflective coating (42) in a manner corresponding to a desired circuit pattern; and a plurality of buffer blocks (46) situated between the covered regions of the reflective coating and the absorbing blocks. The buffer blocks (46) are made of an electrically conducting material, such as carbon in graphite form; tin oxide (and materials based on this compound) and/or indium oxide (and materials based on this compound). Since the buffer material is electrically conducting, rather than insulating, the risk of electrostatic discharge damage is reduced.

摘要翻译： 一种包括衬底（40）的反射光刻掩模（12）; 反射涂层（42）; 以对应于期望的电路图案的方式覆盖所述反射涂层（42）的某些区域的多个吸收块（44）; 以及位于反射涂层的被覆区域和吸收块之间的多个缓冲块（46）。 缓冲块（46）由导电材料制成，例如石墨形式的碳; 氧化锡（和基于该化合物的材料）和/或氧化铟（以及基于该化合物的材料）。 由于缓冲材料是导电的而不是绝缘的，所以减少了静电放电损坏的风险。