公开(公告)号：US11233150B2

公开(公告)日：2022-01-25

申请号：US16910819

申请日：2020-06-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Bum Kim ,  Gyeom Kim ,  Da Hye Kim ,  Jae Mun Kim ,  Il Gyou Shin ,  Seung Hun Lee ,  Kyung In Choi

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L29/66 ,  H01L21/02

Abstract: Example semiconductor devices and methods for fabricating a semiconductor device are disclosed. An example device may include a substrate, a first semiconductor pattern spaced apart from the substrate, a first antioxidant pattern extending along a bottom surface of the first semiconductor pattern and spaced apart from the substrate, and a field insulating film on the substrate. The insulating film may cover at least a part of a side wall of the first semiconductor pattern. The first antioxidant pattern may include a first semiconductor material film doped with a first impurity.

公开(公告)号：US10811541B2

公开(公告)日：2020-10-20

申请号：US16254842

申请日：2019-01-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin Bum Kim ,  Hyoung Sub Kim ,  Seong Heum Choi ,  Jin Yong Kim ,  Tae Jin Park ,  Seung Hun Lee

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L21/02 ,  H01L21/30

Abstract: A semiconductor device includes a gate electrode extending in a first direction on a substrate, a first active pattern extending in a second direction intersecting the first direction on the substrate to penetrate the gate electrode, the first active pattern including germanium, an epitaxial pattern on a side wall of the gate electrode, a first semiconductor oxide layer between the first active pattern and the gate electrode, and including a first semiconductor material, and a second semiconductor oxide layer between the gate electrode and the epitaxial pattern, and including a second semiconductor material. A concentration of germanium of the first semiconductor material may be less than a concentration of germanium of the first active pattern, and the concentration of germanium of the first semiconductor material may be different from a concentration of germanium of the second semiconductor material.

公开(公告)号：US10084049B2

公开(公告)日：2018-09-25

申请号：US15685255

申请日：2017-08-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jin Bum Kim ,  Gyeom Kim ,  Seok Hoon Kim ,  Tae Jin Park ,  Jeong Ho Yoo ,  Cho Eun Lee ,  Hyun Jung Lee ,  Sun Jung Kim ,  Dong Suk Shin

IPC: H01L27/12 ,  H01L29/417 ,  H01L27/092 ,  H01L29/51 ,  H01L29/423 ,  H01L21/02 ,  H01L21/3205

CPC classification number: H01L29/41725 ,  H01L21/02425 ,  H01L21/28518 ,  H01L21/32053 ,  H01L21/823814 ,  H01L21/823821 ,  H01L23/485 ,  H01L27/0924 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/41791 ,  H01L29/42356 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/7848 ,  H01L2924/0002

Abstract: A semiconductor device includes: a substrate having an active region; a gate structure disposed in the active region; source/drain regions respectively formed within portions of the active region disposed on both sides of the gate structure; a metal silicide layer disposed on a surface of each of the source/drain regions; and contact plugs disposed on the source/drain regions and electrically connected to the source/drain regions through the metal silicide layer, respectively. The metal silicide layer is formed so as to have a monocrystalline structure.

公开(公告)号：US12230630B2

公开(公告)日：2025-02-18

申请号：US17571954

申请日：2022-01-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyung In Choi ,  Do Young Choi ,  Dong Myoung Kim ,  Jin Bum Kim ,  Hae Jun Yu

IPC: H01L27/088 ,  H01L21/8234

Abstract: A semiconductor device includes a semiconductor substrate having first and second regions therein, a first lower semiconductor pattern, which protrudes from the semiconductor substrate in the first region and extends in a first direction across the semiconductor substrate, and a first gate electrode, which extends across the first lower semiconductor pattern and the semiconductor substrate in a second direction. A plurality of semiconductor sheet patterns are provided, which are spaced apart from each other in a third direction to thereby define a vertical stack of semiconductor sheet patterns, on the first lower semiconductor pattern. A first gate insulating film is provided, which separates the plurality of semiconductor sheet patterns from the first gate electrode. A second lower semiconductor pattern is provided, which protrudes from the semiconductor substrate in the second region. A plurality of wire patterns are provided, which are spaced apart from each other on the second lower semiconductor pattern. A second gate insulating film is wrapped around each of the plurality of wire patterns.

公开(公告)号：US11705503B2

公开(公告)日：2023-07-18

申请号：US17038004

申请日：2020-09-30

Applicant: Samsung Electronics Co., Ltd. ,  Research & Business Foundation Sungkyunkwan University

Inventor： Jin Bum Kim ,  MunHyeon Kim ,  Hyoung Sub Kim ,  Tae Jin Park ,  Kwan Heum Lee ,  Chang Woo Noh ,  Maria Toledano Lu Que ,  Hong Bae Park ,  Si Hyung Lee ,  Sung Man Whang

IPC: H01L29/66 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786

CPC classification number: H01L29/66545 ,  H01L29/42392 ,  H01L29/6656 ,  H01L29/66439 ,  H01L29/66636 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/78696

Abstract: A semiconductor device includes a substrate, a gate electrode on the substrate, a gate spacer on a sidewall of the gate electrode, an active pattern penetrating the gate electrode and the gate spacer, and an epitaxial pattern contacting the active pattern and the gate spacer. The gate electrode extends in a first direction. The gate spacer includes a semiconductor material layer. The active pattern extends in a second direction crossing the first direction.

公开(公告)号：US20230011153A1

公开(公告)日：2023-01-12

申请号：US17672233

申请日：2022-02-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong Woo Kim ,  Gyeom Kim ,  Jin Bum Kim ,  Dong Suk Shin ,  Sang Moon Lee

IPC: H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L29/417

Abstract: A semiconductor device comprises an active pattern on a substrate; a plurality of nanosheets spaced apart from each other; a gate electrode surrounding each of the nanosheets; a field insulating layer surrounding side walls of the active pattern; an interlayer insulating layer on the field insulating layer; a source/drain region comprising a first doping layer on the active pattern, a second doping layer on the first doping layer, and a capping layer forming side walls adjacent to the interlayer insulating layer; a source/drain contact electrically connected to, and on, the source/drain region, and a silicide layer between the source/drain region and the source/drain contact which contacts contact with the second doping layer and extends to an upper surface of the source/drain region. The capping layer extends from an upper surface of the field insulating layer to the upper surface of the source/drain region along side walls of the silicide layer.

公开(公告)号：US10211322B1

公开(公告)日：2019-02-19

申请号：US15896277

申请日：2018-02-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin Bum Kim ,  Tae Jin Park ,  Jong Min Lee ,  Seok Hoon Kim ,  Dong Chan Suh ,  Jeong Ho Yoo ,  Ha Kyu Seong ,  Dong Suk Shin

IPC: H01L29/66 ,  H01L29/40 ,  H01L29/78

Abstract: A semiconductor device and a method of manufacturing a semiconductor device, the semiconductor device including a channel pattern on a substrate, the channel pattern extending in a first direction; a gate pattern on the substrate, the gate pattern extending in a second direction crossing the first direction and surrounding the channel pattern; and an interface layer between the channel pattern and the gate pattern, the interface layer being formed on at least one surface of an upper surface and a lower surface of the channel pattern.