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公开(公告)号:US11876452B2
公开(公告)日:2024-01-16
申请号:US17477813
申请日:2021-09-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jeongpyo Park , Taehwang Kong , Junhyeok Yang , Donghoon Jung
CPC classification number: H02M3/158 , H02M1/0016 , H02M1/15
Abstract: A DC-DC converter including a switching buck regulator including a first power switch connected to a first power node, a second power switch connected to a second power node, a driver configured to drive the first and second power switches, an output filtering inductor connected to a node between the first and second power switches, and an output filtering capacitor connected to the output filtering inductor, a controller configured to compensate for an output signal of the switching buck regulator in a time domain using a reference voltage, and a feed forward circuit connected between the switching buck regulator and the controller, and including a first buffer, a second buffer, an RC filter, and an adder may be provided. Accordingly, the DC-DC converter can reduce a delay of a compensation circuit, improve transient response characteristics of the switching buck regulator, and further improve the performance of the DC-DC converter.
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公开(公告)号:US20230170800A1
公开(公告)日:2023-06-01
申请号:US17994134
申请日:2022-11-25
Applicant: Samsung Electronics Co., Ltd.
Inventor: Huidong Gwon , Byongdeok Choi , Taehwang Kong , Junhyeok Yang , Junhwan Jang
CPC classification number: H02M3/157 , H03M1/44 , H03M1/502 , H03M1/0607
Abstract: An LDO regulator includes a voltage-to-time converter configured to convert a fluctuation in an output voltage sensed from an output node into a time domain signal having a pulse type, and output the time domain signal, based on a clock signal; a time-to-voltage converter configured to receive the time domain signal, convert the time domain signal into a first voltage control signal performing first compensation for the output voltage, and output the first voltage control signal; an analog amplifier configured to output a second voltage control signal continuously performing second compensation for the output voltage, regardless of the clock signal; and a first pass transistor configured to drive the output voltage based on the second voltage control signal. The LDO regulator is configured to reduce the fluctuation in the output voltage, based on the first compensation and the second compensation.
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公开(公告)号:US12259742B2
公开(公告)日:2025-03-25
申请号:US17994134
申请日:2022-11-25
Applicant: Samsung Electronics Co., Ltd.
Inventor: Huidong Gwon , Byongdeok Choi , Taehwang Kong , Junhyeok Yang , Junhwan Jang
Abstract: An LDO regulator includes a voltage-to-time converter configured to convert a fluctuation in an output voltage sensed from an output node into a time domain signal having a pulse type, and output the time domain signal, based on a clock signal; a time-to-voltage converter configured to receive the time domain signal, convert the time domain signal into a first voltage control signal performing first compensation for the output voltage, and output the first voltage control signal; an analog amplifier configured to output a second voltage control signal continuously performing second compensation for the output voltage, regardless of the clock signal; and a first pass transistor configured to drive the output voltage based on the second voltage control signal. The LDO regulator is configured to reduce the fluctuation in the output voltage, based on the first compensation and the second compensation.
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公开(公告)号:US11899789B2
公开(公告)日:2024-02-13
申请号:US17470875
申请日:2021-09-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: Donghun Heo , Kwangho Kim , Junhyeok Yang
IPC: G06F21/55 , H03K19/20 , G05F1/56 , G01R19/00 , G01R19/165
CPC classification number: G06F21/554 , G01R19/0084 , G01R19/165 , G05F1/56 , H03K19/20 , G06F2221/034
Abstract: A low voltage attack detector includes: a low voltage detector configured to output a low voltage detection flag signal having a high level when a first power supply voltage reaches a first voltage level using a bandgap reference (BGR) circuit including a PMOS transistor and a first bipolar junction transistor (BJT) connected in series between the first power supply voltage and a second power supply voltage; a BGR operation region detector configured to output a malfunction detection flag signal having a high level when the first power supply voltage reaches a second voltage level lower than the first voltage level; and a logic gate configured to output a final low voltage detection flag signal having a high level when at least one of the low voltage detection flag signal and the malfunction detection flag signal has a high level.
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公开(公告)号:US20220385186A1
公开(公告)日:2022-12-01
申请号:US17828829
申请日:2022-05-31
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sungmin Yoo , Hyungmin Lee , Woojoong Jung , Taehwang Kong , Junhyeok Yang , Yunho Lee
IPC: H02M3/158
Abstract: A DC-DC buck converter for generating an output voltage by stepping down an input voltage includes a converting circuit including a plurality of transistors, a first capacitor, a second capacitor, and an inductor, the converting circuit being configured to form a current path that varies according to a plurality of modes and a plurality of phases; and a control circuit configured to: determine a mode of the converting circuit, from among the plurality of modes, according to a first amplitude of the input voltage and a second amplitude of the output voltage, and determine an ON/OFF state of each transistor of the plurality of transistors according to the determined mode and a phase from among the plurality of phases.
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16.
公开(公告)号:US11196344B2
公开(公告)日:2021-12-07
申请号:US16788783
申请日:2020-02-12
Inventor: Sungmin Yoo , Hyungmin Lee , Taehwang Kong , Sangho Kim , Seun Shin , Junhyeok Yang , Woojoong Jung
Abstract: A direct current (DC)-DC converter including: a power switching circuit including a first switch circuit and a second switch circuit that are connected in parallel to a switching node, the first switch circuit and the second switch circuit configured to generate a switching voltage signal through the switching node in response to an input DC voltage and configured to perform complementary switching operations to control a voltage level of the switching voltage signal; and a filter circuit configured to filter the switching voltage signal to generate an output DC voltage.
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