Dynamic thermal budget allocation for multi-processor systems
    11.
    发明授权
    Dynamic thermal budget allocation for multi-processor systems 有权
    多处理器系统的动态热预算分配

    公开(公告)号:US09342136B2

    公开(公告)日:2016-05-17

    申请号:US14292785

    申请日:2014-05-30

    CPC classification number: G06F1/329 G06F1/206 Y02D10/16 Y02D10/24

    Abstract: Embodiments of the present inventive concept relate to systems and methods for dynamically allocating and/or redistributing thermal budget to each processor from a total processor thermal budget based on the workload of each processor. In this manner, the processor(s) having a higher workload can receive a higher thermal budget. The allocation can be dynamically adjusted over time. The individual and overall processor performance increases while efficiently allocating the total thermal budget. By dynamically sharing the total thermal budget of the system, the performance of the system as a whole is increased, thereby lowering, for example, the total cost of ownership (TCO) of datacenters.

    Abstract translation: 本发明构思的实施例涉及用于基于每个处理器的工作负荷从总处理器热预算动态地分配和/或再分配热预算到每个处理器的系统和方法。 以这种方式,具有较高工作负载的处理器可以接收更高的热预算。 分配可以随时间动态调整。 个体和整体处理器性能提高,同时有效分配总体热预算。 通过动态共享系统的总体热预算,整个系统的性能提高,从而降低了数据中心的总拥有成本(TCO)。

    ACTIVE DISTURBANCE REJECTION BASED THERMAL CONTROL

    公开(公告)号:US20210004067A1

    公开(公告)日:2021-01-07

    申请号:US17030193

    申请日:2020-09-23

    Abstract: A system and method for active disturbance rejection based thermal control is configured to receive, at a first active disturbance rejection thermal control (ADRC) controller, a first temperature measurement from a first thermal zone. The ADRC controller generates a first output control signal for controlling a first cooling element, wherein the first output control signal is generated according a first estimated temperature and a first estimated disturbance calculated by a first extended state observer (ESO) of the first ADRC controller.

    Socket interposer having a multi-modal I/O interface

    公开(公告)号:US09946664B2

    公开(公告)日:2018-04-17

    申请号:US14454309

    申请日:2014-08-07

    CPC classification number: G06F13/126 G06F13/4022 G06F13/4063 G11C7/1075

    Abstract: Exemplary embodiments include a socket interposer having a plurality of connectors configured to attach to a server board, the server board including: a first processor socket having a processor form factor, and a first memory associated with the first processor socket, a processor inserted into the at least first processor socket, the processor having access to the first memory, and a second processor socket having the processor form factor, and a second memory associated with the second processor socket, wherein the plurality of connectors are configured to fit the processor form factor; and a multi-modal I/O interface having a first mode and a second mode, wherein in the first mode provides processor-to-processor communication, and the second mode provides the first processor with accessibility to the second memory associated with the second processor socket.

Patent Agency Ranking